fearful-symmetry / gorapl Goto Github PK

Just noticed this: according to the SDM, the pkg domain is the only one that supports two power limit functions, the rest are just one, and the lock bit is at 31.

Our underlying MSR lib supports https://github.com/LLNL/msr-safe , and we might want to add that support downstream to gorapl. Considering that this is a 1% use case, I'm still unsure about how implement this without adding extra baggage to the API as a whole.

This is an open issue for tracking the rest of our Read* functions. A few things:

• The policy MSRs
• the perf_status MSRs
• the power_info MSRs

All the Read* commands should use MSR_RAPL_POWER_UNIT to return pre-formatted data

As per #3 , We need to add a NewRAPLWithOptions() init function so the user can supply a custom path, as well as their own CPU device path.

So, embarrassingly, I don't have nearly as much experience writing to MSRs as I do reading them. This has lead me to wonder how we want to update single values in a write. Presumably modifying the MSR itself isn't hard, and applying a binary AND to the existing value and writing it back will be enough.

The API is a little more interesting: I'm thinking an Option Type that allows us to specify an arbitrary number of values to update might be best:

raplHandler.UpdatePowerLimit(gorapl.OptionLock(true), gorapl.OptionEnableLimit1(true))

Another option would be a struct with &int pointers, as this would allow us to distinguish between uninitialized values. Having pointers everywhere seems awkward, but it's certainly an option.

It would be cool to have some code that actually checks what RAPL domains are available on a given package. The kernel has some code to do this that we could go off of: https://github.com/torvalds/linux/blob/master/drivers/powercap/intel_rapl.c#L1396

Add this to circleCI, make shields for godoc, etc.

We might want to implement something like this:

http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration

so we can figure out how many physical processors are on a system.