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ASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.

License: MIT License

C++ 63.83% C 5.53% VHDL 30.64%
fpga fx2lp ise vhdl cypress asio cpp schematics pcb-design usbdk isochronous midi vhdl-fpga digital-mixer c usb

audioxtreamer's Introduction

AudioXtreamer

A simple multichannel USB/FPGA PCM audio interface:

PCB

Initially started as a simple way to add usb connectivity to the Yamaha 01x firewire based digital mixer & control surface, this project attempts to provide a simple low latency ASIO interface to a usb connected fpga that handles the i2s I/O.

Inspired by Koon and his 24ch out usb interface, it builds further by providing 32in/32out on a simple usb2.0 interface and bypassing any vendor specific driver to communicate with the lowest possible latency with the fpga.

The proof of concept was built and written around the ft232h usb fifo in combination with a zynq fpga but it rapidly became clear that from a practical point of view, a more flexible Cypress FX2LP and a Xilinx Spartan 6 would suffice the needs of the interface. Although the code is now fully adapted to the 16bit data bus of the Cypress and the CoreGenerator fifos of ISE, it is easily portable to the original 8 bit FTDI and the new Vivado IP generator.

The AudioXtreamer can be seen as 3 different parts:

  • A generic C++ ASIO (TortugASIO) multi-threaded 32/64 bit driver that bridges the audio client/DAW to the USB backend
  • AudioXtreamer is a simple user mode driver that uses isochronous transfers to communicate with the fx2lp, plus a tray UI to configure asio buffer sizes, channel count and midi ports. It uses USBDk/WinUSB as backend layer to the FX2LP.
  • VHDL fpga code for the Spartan 6 which handles the usb fifos, sample buffer and generation and decoding of the PCM I/O

The sources are written in such a way that the user can configure how many inputs and outputs can be handled in software and hardware.

To build the whole project you will need basic knowledge of C/C++ and Visual Studio, VHDL and ISE plus basic digital electronics skills.

The hardware implementation is based on the ZTEX 2.01 but simple Aliexpress fx2lp / spartan6 parts should also work with minimal effort.

Xtreamer and ZTEX module for 01x PCB
PCB Gerber

Yamaha 01x retrofitted with AudioXtreamer (USB/ADAT) PCB

audioxtreamer's People

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audioxtreamer's Issues

Cannot compile TortugASIO

I have been trying to compile the TortugASIO driver but it fails as it looks like it may rely on a modified asiosdk? It seems to be trying to use Unicode Windows calls in parts of asiosdk that doesn't support Unicode?

I get lots of this kind of error within the asiosdk register.cpp:

DWORD GetModuleFileNameW(HMODULE,LPWSTR,DWORD)': cannot convert argument 2 from 'char [360]' to 'LPWSTR'

Cypress Device in endless loop

Hello Eltortugo,
I wanted to use your audioxtreamer board to record 16 MEMS-I2S-microphones at the same time.
After flashing the bitstream to the fpga and uploading the default firmware to the fifo, i used the local debugger in Visual Studio 2019 (Windows 10) and recognized, that the method "CypressDevice::Open" ran into an endless loop (no changes in the code).
Now I want to ask, if you used a differend firmware for the cypress chip or if you can imagine what the problem could be.
Best regards.

VS 2019 endless loop

PCB issues

Hi, I am interested in building this but I have noticed a few issues with the PCB. Firstly the resistor networks, RNx appear to be mounted underneath the level shifter IC's, is this correct as I would have thought it would be better to mount them on the reverse of the board and use vias?

Also I have noticed that there don't seem to be any values for some of the passive components (RNx Lx) would you be able to add those to the schematic?

Looks like a great project and I look forward to getting it working with my 01X

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