Idac1
- schematic
- test bench
- test with cascaded 2x bits
- layout cell
- LVS cell
- layout all
- LVS all
Pll1
- starved current oscillator test bench
- fast counter
- digital phase / frequency detection
- external and internal loop mode
- LVS
Opamp1 + VBias1 -- simple differential pair amplifier
- schematic
- test bench
- magic layout
- Fix power routing and vias in layout from Discord message
- Add output stage buffer
- New symbol and layout cell with all three components
- LVS
Gilbert cell mixer
- schematic + test bench
- ?vbias
- ?internal inverter for LO
- layout
- LVS
Putting things together
- decoupling caps
- routing design with pass gates and muxes
- take care of long digital paths in routing with buffers
- try macros with analog and digital together
- ? LVS
TODO: check the idac1 changes. TODO: need stronger transistors to pins also.
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