Name: Johannes de Fine Licht
Type: User
Company: NextSilicon
Bio: Working on a new chip for HPC at NextSilicon.
PhD from ETH Zurich with Prof. Torsten Hoefler on productively programming FPGAs for HPC.
Location: Zurich, Switzerland
Johannes de Fine Licht's Projects
Project 2 of the Applied Statistics course as offered by the Niels Bohr Institute 2013.
Baldur's Gate 3 Missables
Implementation of a vectorized filter in HLS.
Hybrid CPU/GPU implementation of simulation of arbitrary particles and geometry.
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Code for exercises in High Performance Computing in Science and Engineering at ETH Zürich.
Power meter class that reads from Corsair Link devices using the OpenCorsairLink library.
A free frontend for the conformal bootstrap
Collection of CMake scripts, TCL generation scripts, RTL cores and RTL code generators for FPGA implementations that wants to utilize RTL cores.
SDAccel project intended to predict, build for, and measure performance of Xilinx FPGAs.