deepelixir's Projects
Network on Chip Implementation written in SytemVerilog
PyTorch implementation of popular datasets and models in remote sensing
The code for our newly accepted paper in Pattern Recognition 2020: "U^2-Net: Going Deeper with Nested U-Structure for Salient Object Detection."
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
This is a flexible trace-driven cycle-accurate simulator for homogeneous NoCs. It has integrated Orion 2 power model as well as a simple GUI, useful for debugging and displaying routers congestion. In addition, it has frequency throttle and frequency boost based DVFS (dynamic voltage and frequency scaling) implemented at router level. It is meant t
Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.