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Home Page: https://crazy-geeks.github.io/STM32-W25Q-QSPI/
License: MIT License
STM32 Winbond W25Q memory Quad SPI Driver
Home Page: https://crazy-geeks.github.io/STM32-W25Q-QSPI/
License: MIT License
Hey,
thank you very much for the amazing library. Everything is working fine, but when I try to read data using the Fast Read QUAD SPI 4IO I only receive the first few bytes. I am using a W25Q64JV. I tried using the single line read mode and it works fine.
In your read function you use 6 dummy cycles. The datasheet mentions that only 4 dummy cycles are needed. But also with changing that value I still receive wrong data. Do you have any idea what could cause this behavior? Is the fast read working for you?
Im using a Nucleo F767ZI discovery board running at 216 MHz with the QSPI clock prescaler set two 2 (should be 108 MHz on the QUAD SPI clock, which is fine).
size == 32 || size == 64 will return W25Q_PARAM_ERR.
I think Line 859 should be changed to
if (size != 32 && size != 64)
/**
w25q_mem.c often includes the line "buf_reg |= 0b10;"
according to this post https://stackoverflow.com/questions/2611764/can-i-use-a-binary-literal-in-c-or-c#2611883 that is only possible in C++ since C++14
i suggest replacing the binary literals with hex literals to support C and older C++ compilers
the IAR compiler (in C mode) gave the following unhelpful error message:
Error[Pe065]: expected a ";"
Hello. Good library. But there is a bug. It have a function 'W25Q_ReadStatusStruct' and calls it from 'W25Q_Init' and others with argument NULL. I you have memory mapped to 0x0, the memory will be corrupted. I needed to use ITCM (0x0 address) in my stm32h7 and spent a day to to figure out the issue. So need to replace "status->BUSY = w25q_status.BUSY = SRs[0] & 0b1;" with "w25q_status.BUSY = SRs[0] & 0b1;" etc.
P.S. Need to implement DMA.
Hi, it is possible to use W25Q16JVZPIQ with STM32F446RE with quad spi configured in dual line mode? If yes, any modification is needed?
BR
Hello, there is a definition error in the driver you provided.
#define W25Q_WRITE_EXT_ADDR_REG 0xC8U ///< write extended addr reg (only in 3-byte mode)
The correct one is:
#define W25Q_WRITE_EXT_ADDR_REG 0xC5U
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