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Comments (9)

MaJerle avatar MaJerle commented on June 4, 2024
  1. Is the CAN bus configured to 500kbit in STM32?
  2. Is the STM32 clock running with external oscillator and system clock is properly set?

I'd start by verifying those.

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

Hi, yes the bus CANFD is configurated to 500kbps
image

The running clock is HSE (25MHz) over PLL1Q to 137,5 MHz in the FDCAN1
image

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MaJerle avatar MaJerle commented on June 4, 2024

Your device receives some data as seen in the tool you use, but if you have a frame error, means you have data corruption. In 99.9% of the time, it is due to wrong clock.

I'd say connect logic analyzer and inspect there.

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

The clock must be right, cause of the UART is correctly working. I will change the frecuency of the FDCAN and check it with logic analyzer

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

I have checked the clock in the eval kit and it is correctly set to 25MHz, also the analyzer is correct working with NXP eval kit, seems like something is not working correctly in the stack

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

I have just check if there is a problem of my code, and there is the same behavior in your example for the stm32h7xxx. Please can you help me with this bug?

For transmiting to the TXFIFO I need to change the TX Buffers Nbr to 8, if I dont change it the function HAL_FDCAN_AddMessageToTxFifoQ never sent nothing to the CAN bus

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MaJerle avatar MaJerle commented on June 4, 2024

Packets are going out - this you can see.
What are the data packets? Is frame error meaning invalid CANOPEN packet, or invalid CAN packet?

Fact is that stack does try to send something, and it seems CAN IP sends out something too.
What does logic analyzer say on this?

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

I check that my clock for CANFD come from HSE (25MHz), is this clock correct?, also tomorrow I will check if logic analyzer told me something about the frames.

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urrudelu30 avatar urrudelu30 commented on June 4, 2024

Hi,

Today I put the logic analyzer in the smt32 device, te first frame that the program sent is the following:
image

It is the NMT Heartbeat according with the 0x715 identifier, my doubt is regarding the last part of the frame that the logic analyzer analise as Error. Maybe this is my problem?

Regards,
Aitor

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