Name: Bruce Hoult
Type: User
Bio: Now at @kamihq working on a digital classroom site. Previously @sifive working on compilers, JITs, VMs, runtimes for @riscv, and before that Samsung R&D Russia.
Location: Kerikeri, New Zealand
Blog: http://hoult.org/bruce
Bruce Hoult's Projects
GNU toolchain for RISC-V, including GCC
Information and Frequently Asked Questions about the RISC-V computer instruction set
RISC-V Instruction Set Manual
Spike, a RISC-V ISA Simulator
old RISC-V LLVM from 2019
RISC-V Meta – a suite of tools that operate on RISC-V ISA (Instruction Set Architecture)
RISC-V port of newlib
RISC-V Opcodes
QEMU with RISC-V (RV64G, RV32G) Emulation Support
Run RISC-V development environment using docker
RISC-V V vector extension
Example of RISC-V Vector programming
Simple demonstration of using the RISC-V Vector extension
Sample code for Virtualization framework
slic3r config files for my DiamondMind 3D printer
Optimal LZ4 compression
Automatically exported from code.google.com/p/smhasher
Test implementation of tbljal-like facility using standard RV64I instructions
Valgrind with support for the RISCV64/Linux platform.
An example program in Dylan
RISC-V XBitmanip Extension