chisel-training's Introduction

Chisel-Training

Overview

This course is aimed for both practitioners as well as academics involved in Digital Design. Chisel (Constructing Hardware in a Scala Embedded Language) is an open-source hardware construction language (HCL) used to generate digital circuits at the register-transfer level. The object-oriented as well as functional programming aspects of Scala are inherited in Chisel for digital hardware generation. Digital circuits described in Chisel are translated to equivalent Verilog for synthesis as well as simulation.

After completing this course, the reader will be able to program for modular hardware generation that can be parameterized. Specifically, the reader will be able to synthesize combinational and sequential circuits, implement state machine, develop data-paths and controllers for different processor architectures, though the focus of this course will be on RISC V architecture. Below is the list of topics that are covered.

Introduction to Chisel (chisel3) and Scala
Combinational circuits, Control flow, Testing in Chisel
Parameterization
Sequential circuits, Finite state machines, Memories
Collections in Scala, Scala I, Scala II
Project
Scala III, Scala IV
Diplomacy & TileLink in RocketChip

The topics 1 to 4 cover different Chisel constructs that are used for hardware construction. The topics 5 and 7 selectively introduce Scala components that enable parameterized hardware generation. The proposed project is aimed to employ both Chisel as well as Scala to develop parameterized hardware modules allowing reusability. The examples and use cases are drawn from rocketchip core generators.

Chisel Programming Manual