avnet / ultra96-pynq

Board files to build Ultra 96 PYNQ image

Grab the pre-built SD images

Click here to obtain SD card images for Ultra96 v1 or v2

Need a little help building your own Vivado Ultra96 Overlays?

See the Ultra96 Jupyter Notebooks folder: creating_Ultra96_overlays.ipynb

Optional: add on Xilinx Vitis AI hardware accelerated inference for PYNQ >= v2.5

Built for Ultra96 v1 & v2, click here for how to get started!

Build your own PYNQ SD image for Ultra96 v1/v2

This is OPTIONAL for advanced users if they want to rebuild their own U96 PYNQ images.

This repository contains source files and instructions for building PYNQ to run on the Ultra96 board.

Building PYNQ for Ultra96 can take a while. Plan accordingly!

Required tools:

• Ubuntu 18.04 or 20.04 LTS 64-bit host PC
• Passwordless SUDO privilege for the building user
• At least 160GB of free hard disk space if you do not have the Xilinx tools installed yet
• Roughly 80GB of free hard drive space if you have the Xilinx tools installed
• You may be able to work with less free hard drive space, YMMV
• At least 8GB of RAM (more is better)
• Xilinx Petalinux and Vitis or Vivado v2022.1 tools
• Read Xilinx UG1144 for Petalinux host PC setup requirements
• Create a Xilinx account to obtain and license the tools

Step 1: Setup the tools

Make sure you 'source' the settings64.sh (Vivado) and settings.sh (PetaLinux) scripts to add them to your path

Step 2: One time PYNQ tools setup

• Clone PYNQ from https://github.com/Xilinx/PYNQ and checkout branch: image_v3.0
• cd into the clone and proper branch, then execute "./sdbuild/scripts/setup_host.sh"
• Install any requested additonal Debian apt packages that setup_host.sh asks for
• Once setup_host.sh is successful, reboot and re-login
• You may remove the just cloned PYNQ git repo, it is no longer needed

Step 3: Clone the Ultra96 repository

Retrieve the Ultra96 PYNQ board git into a new directory somewhere outside the prior PYNQ git directory.

Clone the Ultra96-PYNQ git repo and checkout the image_v3.0 branch.

git clone https://github.com/Avnet/Ultra96-PYNQ.git --branch image_v3.0

Step 4: Build the SD image for Ultra96

Execute a simple build script that will create an SD image for either Ultra96 v1 or v2.

Before executing the script, cd into the previously cloned repo directory.

For Ultra96 v2:

./build96 2

For Ultra96 v1:

./build96 1

The build script will first download the PYNQ git repo then a large rootfs, other files and appropriate bsp files. The downloads can take some time. Once the files are downloaded, the script is smart enough to use what has already been downloaded. If a file download stops part way you will have to manually delete the corrupted file. Currently the build script does not clean this up automatically. The overall build itself can take some time to complete. UPDATE: the build script for Ultra96 v3.0 PYNQ now recovers from disrupted supplemental file downloads!

Step 5: Burn the SD image

Please use Balena Etcher or Win32 Disk Imager to copy the .img file onto an SD card 16GB or larger. Samsung EVO based SD cards and related rebrands will not boot on the Ultra96. Delkin and SanDisk uhs-1 type cards work well, other brands may also.

ultra96-pynq's Issues

Failed to install docker _not sure if it is OS incompatible issue

I succesfully installed the PYNQ with http://avnet.me/ultra96v2-pynq-image-v2.6
Further, I am going to install docker and then use FINN.
But encountered some errors:
I follow the install instruction via Install Docker Engine on Ubuntu, in order to fit the ubuntu contribution codename with docker's, I revised the codename from WFH to bionic in file of "lsb_release".
But when I install by using command :

There is still errors like"

I have googled and got some comments said it come from incorrect Ubuntu distribution codename, but I am pretty sure the bionic is the correct name selected.
Is anyone has experienced and gets any solution?

Enable Wifi for Ultra96-V2? How ??

Can you help and take a look at this issue:

https://discuss.pynq.io/t/i-finally-boot-up-ultra96-v2-using-pynq-but-not-let-me-login/4946

PS SPI unit user device drivers not showing up

Preparing a solution and pull request. The potential fix is to modify the system-user.dtsi with the following entries:

&spi0 {
is-decoded-cs = <0>;
num-cs = <1>;
status = "okay";
spidev@0x00 {
compatible = "spidev";
spi-max-frequency = <1000000>;
reg = <0>;
};
};

&spi1 {
is-decoded-cs = <0>;
num-cs = <1>;
status = "okay";
spidev@0x00 {
compatible = "spidev";
spi-max-frequency = <1000000>;
reg = <0>;
};
};

unable to get grove sensors96 mezannine working with Ultra96

link to board: https://www.96boards.org/product/sensors-mezzanine/

I managed to generate a sensors96 bitstream in vivado to install into the Ultra96 as the overlay, I am able to access the PL/PS ports but i am unable to communicate to the onboard arduino in any way. Output of flashing Blink.ino here:

Running dmesg | grep tty to check the available serial ports gives me this output but i am unable to communicate to them

In case my bitstream is wrong here are the steps:
i cloned the sensors96b directory, removed the v2 in sensors96b.tcl.v2, opened vivado tcl and ran source ./sensors96b.tcl to which a block diagram opened for me to generate HDL wrapper and then generated the bitstream where i copied the .bit and .hwh files to the Ultra96. This is the block diagram

Is this one suitable for Ultra96-V2?

Is this one suitable for Ultra96-V2?

Instructions good but hardware design it trys to use is not

The main readme file and a .spec name was recently changed to instruct on how to create a PetaLinux BSP from scratch. It said to use the sensors96b hardware design that is included in this repo. It works but has stability issues if used for a while. After further investigation it was discovered that many of the SoC settings are incorrect, the biggest problem is incorrect DDR settings.

To be clear the hardware design if used after boot as a PYNQ overlay/bitstream does not load the DDR memory controller with incorrect settings. It is only when importing this design as a hardware description for PetaLinux that uses the invalid settings.

So I am going to redo the instructions until this is resolved. For now users who need to build the PYNQ distribution from scratch should use the official 2018.2 zcu100 bsp that can be obtain through a Xilinx developer account.

Heating and CPUs at max speed

The board heats up very quickly and I could not figure out how to change the governor. After some digging it seems that the xilinx drivers should support multiple governors but after checking it on my board it seems that the only available governor is "userspace" and all the cores run on max all the time.

Purpose of fix_u96v2_pwrseq_simple.patch

What is https://github.com/Avnet/Ultra96-PYNQ/blob/master/Ultra96/petalinux_bsp_v2/meta-user/recipes-kernel/linux/linux-xlnx/fix_u96v2_pwrseq_simple.patch doing? It lacks a commit message and the commit introducing it as well. I suppose it's not related to the SD card but rather the SDIO-attached WIFI module, right?

ultra96 sdsoc platform

I had successfully built sdsoc hardware platform for zcu102 according to the guidence of ug1146 ,but I met some problem when building sdsoc hardware platform for ultra96.
I created vivado project from the vivado project in the ultra96.bsp and remove unrelated peripherals

I created petalinux project from the ultra96.bsp too, and added xlnk in device tree, the system-user.dtsi is shown below

/include/ "system-conf.dtsi"
/{
xlnk {
compatible = "xlnx,xlnk-1.0";
};
};

What's more, I added

CONFIG_XILINX_APF=y
CONFIG_XILINX_DMA_APF=y

CONFIG_CMA_SIZE_MBYTES=1024
CONFIG_STAGING=y

# CONFIG_CPU_IDLE is not set
# CONFIG_CPU_FREQ is not set
CONFIG_EDAC_CORTEX_ARM64=y

in project-spec/meta-user/recipes-kernel/linux/linux-xlnx/bsp.cfg.

After that I created SDSoC platform and tested matrix mult on it.
When I execute the elf, it returns

xilinx-axidma xilinx-axidma.0: channel  dm_0:0 has errors 14209, cdr 40500000 tdr 40500000
xilinx-axidma xilinx-axidma.0: cur_bd@40500000
xilinx-axidma xilinx-axidma.0: buf = 0000000020574660
xilinx-axidma xilinx-axidma.0: ctrl = 0x000009a0
xilinx-axidma xilinx-axidma.0: sts = 0x00000000
xilinx-axidma xilinx-axidma.0: next = 0000000040500080

Slow download speed for prebuilt images

The ~2GB prebuilt images are not hosted on GitHub but on the Avnet website instead, and the max download speeds I'm able to get are ~350KB/s, so it takes long to download.

Route UART1 to expansion connector

What is missing in the default BSP to route UART1 also to the pins on the expansion connector? That way, the UART-USB converters on shields like https://www.96boards.org/product/uartserial/ or https://www.96boards.org/product/sensors-mezzanine/ would just work for default console, like on other 96boards.

Back then, Alex Graf did this for the Ultra96-v1 BSP that OpenSUSE used to provide, and I adopted it for https://github.com/siemens/jailhouse-images. I'm missing this now in the v2 BSP which I had to build from this repo. Would be nice to keep it in my image, and I could also imagine that users of the reference image would appreciate such a feature.

NFS server does not work for Ultra96 V1, PYNQ V2.5

I flashed latest PYNQ and ran:
apt update
apt install nfs-kernel-server
I got:
pynq systemd[1]:nfs-server.service: Dependency failed for NFS server and service
pynq systemd[1]:nfs-server.service: Job nfs-server-service/start failed with result "dependency"
I tried systemctl restart nfs-kernel-server and got the same errors.
I tried:
apt purge nfs-kernel-server
apt upgrade
apt install nfs-kernel-server
and got the same errors.

Kernel, gcc and modules (v2.6)

Another little issue with kernel in v2.6: it's buit with gcc-9.2.0, which is not available from the PYNQ image. More so, trying to install one from Ubuntu using the usual add-apt-repository ppa:ubuntu-toolchain-r/test does not work straight away either (unless lsb-release is modified to pretend it's ubuntu18.04, no PPAs can be added).

And since stack guard option is on in this kernel, no module can be built with a gcc below 9. This is a little inconsistency and is relatively easy to fix (just provide gcc-9 out of the box?).

Cannot open the jupyter page

I download the 2.3 image to a 16GB SD card(which is the one come from the board) and flash it by Etcher.
The system boot up, all wifi, USB-ethernet and USB COM are working.
I can ping 192.168.3.1 when I am using USB-ethernet but not in the browser.( Not able: Connecting to Jupyter Notebooks ). Same thing happen on WIFI connection with IP 192.168.2.1
I can use USB COM to telnet into the board and I can use \192.168.3.1\xilinx to access the files in the system.
BUT NOT …. Jupyter Notebooks.
Is there a way to check the Jupyter Notebook is running from the USB COM (serial connection)?

Ultra96 Board with PYNQ Connectivity Issues

Hey!
I have been working with my Ultra96 board with PYNQ v2.3 for a few days now, but suddenly the wifi access point does not appear when I turn on the board. I cannot also connect via USB.
After booting the DONE LED turns on and the the Linux heart beat LED begins to blink so it couldn't be a SD issue right? I reformatted the SD and flashed PYNQ again but still no luck.

Link to access the Ultra96V2 image is broken.

http://avnet.me/ultra96v2-pynq-image-v2.6 doesn't work,

avnet.me seems to be old or down

where is ultra96-v2 bsp????

In the development I want to get ultra96-2 BSP source code package

I tried

xilinx-ultra96-reva-v2018.2-final.bsp from xilinx

Ultra96-V1 - PetaLinux 2018.2 BSP
Ultra96-V1 - PetaLinux 2018.3 BSP

and
sensors96b_v2.bsp
from
https://github.com/Avnet/Ultra96-PYNQ imagev2.4_v2 branch
but None of them can walk normally
so
where is ultra96_v2 bsp??????

No wifi access point after booted.

Hi, it's quite a annoyed issue that the wifi access point.

After create the PYNQ V2.4 image on Ultra96-v1, the system can successfully boot.

However, after the system boot light comes up and there is no wifi hot spot.

The board still can be connected through USB cable and access the wifi.ipynb

Yet this is quite inconvenient, anyway to fix this?

THX

none of the pre-built images are downloading

trying to download any of the prebuilt images produces a page with this text

Third-party server not responding.
The resource you have requested is located on a third-party server. WebSEAL has attempted to send your request to that server, but it is not responding.
Explanation
This could be due to the third-party server being offline, or to network problems making it unreachable. The problem is not with the WebSEAL server itself.
Solutions
Retry your request later, or contact the system administrator for assistance.
[none BUTTON]

not sure if you are the system admin for where it is stored, but flagging it here incase

Ultra96 Vivado Project for Base Hardware

Where could I find the Vivado project for the base hardware?

Build error when building PYNQ-compatible BSPs from scratch

Hi, I'm trying to build PYNQ image along with BSP.

I followed the "Building PYNQ-compatible BSPs from scratch" section in the README, but when I do "make BOARDDIR=<LOCAL ULTRA96>", I got various errors like "undefined reference to `eth_register'".

The error seems to be the same one reported here. I tried the solution suggested in that post, but without success.

Can you tell me how to resolve this issue?

My build environment: Ubuntu 16.04 on docker with Vivado and Petalinux 2019.1. I'm targeting Ultra96 v2.

PMBUS in Ultra96 V2 2.5

is there any way by which we can access power rails via pynq pmbus in ultra96 v2. I would like to know if it is possible to measure power via pmbus without flashing the board to v2.6 image?

Ultra96 v2 & v2.5 - Boot OK but Done LED does not lit. up

I download the img from here: http://www.pynq.io/board.html
Everything is fine, except the indicator LED stuck at init LED (red one) and doesn't change to Done LED (blue one) even though the OS has loaded. This didn't happen when I use v2.4.
Hope that this issue only appear with the pre-built img on that webpage.

Ultra96-v2 RNDIS Driver fails to install on Windows 10 64-bit

I am attempting to connect a Ultra96-V2 running v2.6 PYNQ for Ultra96, however when connecting the Ultra96-V2 to a Windows 10 64-bit system via the USB cable, the RNDIS driver fails to load.

This is the error from Device Manager:

The drivers for this device are not installed. (Code 28)

There are no compatible drivers for this device.


To find a driver for this device, click Update Driver.

The USB Controllers entry shows Unknown for the USB Device from the Ultra96-V2 with this under Device Status:

Windows has stopped this device because it has reported problems. (Code 43)

This is the message from the Ultra96-V2 dmesg:

[   11.066978] usb0: HOST MAC 22:ca:55:3d:96:df
[   11.067049] usb0: MAC 62:85:54:cb:43:2d
[   11.371016] configfs-gadget gadget: high-speed config #1: c
[   11.371310] IPv6: ADDRCONF(NETDEV_CHANGE): usb0: link becomes ready
[   11.505596] random: crng init done
[   11.505610] random: 7 urandom warning(s) missed due to ratelimiting
[   13.825323] [drm] Pid 510 opened device
[   13.825345] [drm] Pid 510 closed device
[   14.291373] [drm] Pid 510 opened device
[   14.291507] [drm] Pid 510 closed device
[ 1809.886629] configfs-gadget gadget: high-speed config #1: c

The PC connection is USB-2 so could that be the issue?

I can connect a BeagleBone Black to the same system without issue.

Ubuntu 18.04 name resolution fails inside the chroot for pip install

I am trying to build image v2.5 for Ultra96v2. After some wrestling with dependencies on my Ubuntu 18.04 system I am running into this error. Please suggest any workarounds.

Ubuntu 18.04, Vivado, Petalinux and XSDK all are 2019.1. (I tried 2019.2 but they have different issues and XSDK is removed)

End goal is to be able to build a custom kernel module that can drive the instantiation of the PL.

_xhdmi/hdmi_functions.c:5:10: fatal error: libxlnk_cma.h: No such file or directory                                                                         
 #include <libxlnk_cma.h>                                                   
          ^~~~~~~~~~~~~~~                                                   
compilation terminated.                                                     
embeddedsw_lib.mk:31: recipe for target '_xhdmi/libxhdmi.so' failed         
make[2]: *** [_xhdmi/libxhdmi.so] Error 1                                   
make[2]: Leaving directory '/tmp/pip-uzk59_qf-build/pynq/lib/_pynq'         
Makefile:7: recipe for target 'all' failed                                  
make[1]: *** [all] Error 2                                                  
make[1]: Leaving directory '/tmp/pip-uzk59_qf-build/pynq/lib/_pynq/_xhdmi'  
error: command 'make' failed with exit status 2                             
                                                                            
----------------------------------------                                    

Can't roll back pynq; was not uninstalled
Command "/usr/bin/python3 -u -c "import setuptools, tokenize;file='/tmp/pip-
uzk59_qf-build/setup.py';f=getattr(tokenize, 'open', open)(file);code=f.read
().replace('\r\n', '\n');f.close();exec(compile(code, file, 'exec'))" instal --record /tmp/pip-3gw6phh4-record/install-record.txt --single-version-external
ly-managed --compile" failed with error code 1 in /tmp/pip-uzk59_qf-build/

V2.7 PYNQ for Ultra96v2, cannot import pynq

Python 3.8.2 (default, Mar 13 2020, 10:14:16) 
[GCC 9.3.0] on linux
Type "help", "copyright", "credits" or "license" for more information.
>>> import pynq
/usr/local/share/pynq-venv/lib/python3.8/site-packages/pynq/pl_server/xrt_device.py:88: UserWarning: xbutil failed to run - unable to determine XRT version
  warnings.warn(
>>> from pynq import Xlnk
Traceback (most recent call last):
  File "<stdin>", line 1, in <module>
ImportError: cannot import name 'Xlnk' from 'pynq' (/usr/local/share/pynq-venv/lib/python3.8/site-packages/pynq/__init__.py)
>>> 

Hi, I am using the recent v2.7 image for Ultra96 v2. I wrote the image to sd card and ssh to the board.
I opened up the python interactive session by typing python, and am trying to import pynq and xlnk, it doesn't work.
I was able to use v2.5 with Ultra96v2 normally.

2.6 First Boot up issues(Connection refused, no jypter notebook)

Hi when i go to the root IP address with a fresh install of pynq 2.6 I can't access through ssh as i get connection refused and i cannot seem to see the "jupyter notebooks" as the default "Apache2 Ubuntu Default Page"

mmc0 error during boot

I am using the sensors96b_v2.bsp with petalinux and non of the pynq components.

Upon booting I can see the following dump

[  169.596187] mmc0: sdhci: ============================================
[  169.602674] mmcblk0: error -110 requesting status
[  179.728989] mmc0: Timeout waiting for hardware cmd interrupt.
[  179.734723] mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
[  179.741147] mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00001002
[  179.747571] mmc0: sdhci: Blk size:  0x00000000 | Blk cnt:  0x00000000
[  179.753994] mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000000
[  179.760417] mmc0: sdhci: Present:   0x01f70000 | Host ctl: 0x00000001
[  179.766840] mmc0: sdhci: Power:     0x0000000f | Blk gap:  0x00000080
[  179.773263] mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x0000fa07
[  179.779686] mmc0: sdhci: Timeout:   0x00000000 | Int stat: 0x00000001
[  179.786110] mmc0: sdhci: Int enab:  0x00ff0083 | Sig enab: 0x00ff0083
[  179.792533] mmc0: sdhci: AC12 err:  0x00000000 | Slot int: 0x00000001
[  179.798956] mmc0: sdhci: Caps:      0x31e8c881 | Caps_1:   0x00002007
[  179.805379] mmc0: sdhci: Cmd:       0x00000000 | Max curr: 0x00000000
[  179.811803] mmc0: sdhci: Resp[0]:   0x00000000 | Resp[1]:  0x00000000
[  179.818226] mmc0: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
[  179.824648] mmc0: sdhci: Host ctl2: 0x00000000
[  179.829076] mmc0: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000000000
[  179.836192] mmc0: sdhci: ============================================

and this is what xsct console shows:

xsct% XSDB Server Channel: tcfchan#9
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #0 (target 10) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #2 (target 12) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #2 (target 12) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #3 (target 13) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #3 (target 13) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #1 (target 11) Stopped at 0x0 (Cannot resume. APB AP transaction error, DAP status 0x30000021)
xsct% Info: Cortex-A53 #1 (target 11) Running
xsct% Info: Cortex-A53 #0 (target 10) Running

I am not able to boot into linux.

Heating issue

The board heats up very quickly and I could not figure out how to change the governor. After some digging it seems that the xilinx drivers should support multiple governors but after checking it on my board it seems that the only available governor is "userspace" and all the cores run on max all the time.

Is an Ubuntu 20 based image in the works?

Newer ROS versions recommend Ubuntu 20, so with this image we are stuck with older releases.

AXI4 master in PL

Is it possible to enable, say, S_AXI_HPC0_FPD without rebuilding the BSP? If not, can we have it enabled by default / at least have an official build where it's enabled and driven by some stub?

How do I get connected to the board (Ultra96-v2 & Ultra96-PYNQ v2.5)?

Hi, I got the Ultra96-v2 board from the contest DAC-SDC 2020, and it was shipped to me with the board itself, an SD card and an adapter, and several AC adapters. It was because of the COVID-19 that I can only get my hands on the board recently. I am new to embedded devices and FPGA so I need to learn a lot of things.

Firstly, I followed the instructions on the getting-started guide from the package box and everything works great with the ultra96v2_oob_2018_3_190917_8GB.img image. I tried several examples and toggled the WIFI settings.

But when I flashed another image ultra96v2_v2.5.img from http://www.pynq.io/board.html, problems occurred: I cannot get connected with the board through neither USB port, WIFI or the miniDP. Turn on the board and LEDs are:

• Done LED (D1): off
• Power On LED (D2): on
• 4x User LEDs: D3/4/6: off, D7: yellow light in heartbeat pattern
• Wireless LAN (D9) and Bluetooth (D10) LEDs: on

In the very beginning, I thought the problem was the red LED, but the fact is not true since #41 (comment) explains that the red LED is because of the non-loaded bitstream. I don't know what the bitstream stands for though.

I tried the following connecting methods, but all failed:

• Connecting with the USB port. I learned from https://www.element14.com/community/docs/DOC-93372/l/ultra96-v2-gsg-v11?ICID=ultra96v2-datasheet-widget that it seems the v2 board can only be able to get connected via USB connection using the USB-to-JTAG/UART pod, but then I went to the contest discussion platform https://piazza.com/class/k3om932nrqxcj and found that some contesters were able to connect via USB without the Pod. Do I need to install Vivado or something in order to connect with the board via USB? My OS is windows 10 BTW.
• Connecting with WIFI. I learned from #33 (comment) and https://pynq.readthedocs.io/en/latest/faqs.html?highlight=wifi%20access%20point#how-can-i-enable-wireless-access-point that the WIFI access is a feature for PYNQ that needs to be turned on manually. How do I turn on this feature in the case I cannot get connected with the board?
• Setting up a local desktop with a monitor, mouse and keyboard. There is just simply no output signal when I connect the monitor to the board's miniDP port using a miniDP-to-HDMI cable, even if the click mouse and type on the keyboard.

So what should I do to get connected with the board using PYNQ? I am installing Vivado and HLS. Hope this will help me get connected via USB.

Ultra96 V2 2.5 Bluetooth can‘t scan any devices

Hi,

In the ultra96 V2 2.5 image, I could not use bluetooth. the bluetooth states as follows

Controller F8:F0:05:C3:1A:5F (public)
Name: pynq
Alias: pynq
Class: 0x00000000
Powered: yes
Discoverable: yes
Pairable: yes
UUID: Generic Attribute Profile (00001801-0000-1000-8000-00805f9b34fb)
UUID: A/V Remote Control        (0000110e-0000-1000-8000-00805f9b34fb)
UUID: PnP Information           (00001200-0000-1000-8000-00805f9b34fb)
UUID: A/V Remote Control Target (0000110c-0000-1000-8000-00805f9b34fb)
UUID: Generic Access Profile    (00001800-0000-1000-8000-00805f9b34fb)
Modalias: usb:v1D6Bp0246d0530
Discovering: yes

but i can‘t scan any devices?

[bluetooth]# scan on
Discovery started
[CHG] Controller F8:F0:05:C3:1A:5F Discovering: yes
[bluetooth]# devices
[bluetooth]# scan off
[CHG] Controller F8:F0:05:C3:1A:5F Discovering: no
Discovery stopped
[bluetooth]#

desktop now show

console show login,but cannot show desktop

[URGENT PLS] Ultra96 V2 2.5 Bluetooth not working

Hi,

In the ultra96 V2 2.5 image, I could not use bluetooth. I need to use bluetooth for my project.

Whenever I use hciconfig or hcitool , No devices are being found. Can you please let me know how can I enable bluetooth in the ultra96 v2 board?

Board=Unknown

on 08_24 release, I saw BOARD=Unknown. Something to verify in next release.

Incomplete kernel headers in v2.6 (Ultra96v2 image)

How to reproduce:
git clone https://github.com/ikwzm/udmabuf.git
cd udmabuf
make

Apparently asm/types.h and a lot more are not in the right place. In v2.5 kernel headers were ok (with the large /kernel.tgz tarball) out of the box.

PL Devicetree Overlay - Ultra96 v2, PYNQ v2.5

I am attempting to utilize the sensors96b Vivado hardware project with PYNQ on my Ultra96v2 board. In particular, I am interested in configuring PL UART drivers in Linux upon loading the PYNQ overlay. I would like to ensure a device tree overlay is properly added when loading the sensor96b.bit overlay with PYNQ.

Examining the PYNQv2.5 - Ultra96v2 SD card image supplied, there is no .dtbo file availble anywhere, at least in ROOTFS. In an effort to produce one, I followed the Ultra96-PYNQ build instructions in the README. I have had success with building for both the provided BSP and from scratch BSPs, with the v2.5 branches of both this repo and PYNQ.

From my NOT-extensive knowledge of how the the PYNQ build process behaves, it seems the device tree is built successfully with system-top.dtb reflecting the absence of pl.dtsi nodes as PYNQ 2.5 no longer includes PL in the base devicetree. Additionally, I can see that there are device tree overlays (system.dtbo and PL.dtbo) being produced by PYNQ, which seemed hopeful.

With no deviation from the build instructions, boot is seems successful with the needed UART16550a kernel module being loaded with 4 supported ports and no dmesg mentions of any compatible devices, as they haven't been loaded to PL yet.

pynq kernel: [ 2.467237] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled

Upon loading the sensors96b.bit overlay with PYNQ, the FPGA is programmed successfully and /var/log/sysylog shows:

xilinx@pynq:~$ tail /var/log/syslog 
pynq kernel: [15100.142784] fpga_manager fpga0: writing sensors96b.bin to Xilinx ZynqMP FPGA Manager

However, after loading this overlay, the device tree seems to remain the same (accessed through /proc) with no additional entries for the two UART IP of the sensors96b block diagram. There are also no configuration changes to any of the available /dev/ttySX entries.

xilinx@pynq:~$ setserial -g /dev/ttyS*
/dev/ttyS0, UART: unknown, Port: 0x0000, IRQ: 0
/dev/ttyS1, UART: unknown, Port: 0x0000, IRQ: 0
/dev/ttyS2, UART: unknown, Port: 0x0000, IRQ: 0
/dev/ttyS3, UART: unknown, Port: 0x0000, IRQ: 0

With no automatic device tree updates, I figured I would add the .dtbo file myself as the PYNQ documentation suggests that a dtbo can be explicitly provided when instantiating and loading an overlay. See PYNQ overlay package and this suggestion.

overlay = Overlay('your_overlay.bit', dtbo='your_overlay.dtb')

Not knowing which of the PYNQ produced .dtbo files to use, I attempted to use both after transferring them to the home directory.

overlay = Overlay("/home/xilinx/pynq/overlays/sensors96b/sensors96b.bit", dtbo="/home/xilinx/pl.dtbo")
overlay = Overlay("/home/xilinx/pynq/overlays/sensors96b/sensors96b.bit", dtbo="/home/xilinx/system.dtbo")

With syslog error entry for both being similar:

pynq kernel: [16909.758757] fpga_manager fpga0: writing sensors96b.bin to Xilinx ZynqMP FPGA Manager
pynq kernel: [16909.918772] OF: overlay: remove: Could not find overlay #0
pynq kernel: [16909.948244] fpga_manager fpga0: writing .bin to Xilinx ZynqMP FPGA Manager
pynq kernel: [16909.948283] fpga_manager fpga0: Direct firmware load for .bin failed with error -2
pynq kernel: [16909.948291] fpga_manager fpga0: Error requesting firmware .bin
pynq kernel: [16909.954193] fpga_region region0: failed to load FPGA image
pynq kernel: [16909.959679] OF: overlay: overlay changeset pre-apply notifier error -2, target: /fpga-full
pynq kernel: [16909.967941] OF: overlay: overlay changeset pre-apply notify error -2
pynq kernel: [16909.974302] create_overlay: Failed to create overlay (err=-2)

From syslog, I can see that the call to PYNQ's overlay instantiatation triggers a fpga_manager call that is successful. Presumably the expected behavior of just passing in an overlay bitstream. However, the subsequent syslog entries show fpga_manager failing, with attempts to write ".bin" to it. This led me to discover the device tree outputs of PYNQ when using the sensor96b-v2.bsp produce the pl.dtsi file with the contents:

...
/ {
	fragment@0 {
		target = <&fpga_full>;
		overlay0: __overlay__ {
			#address-cells = <2>;
			#size-cells = <2>;
			firmware-name = ".bin";
			resets = <&zynqmp_reset 116>;
		};
	};
...

I am simply not sure why the firmware-name is being left blank? Presumably this should reflect the /lib/firmware/sensors96b.bin firmware referenced by the above successful overlay instantiation with no dtbo file specified. Without this fix, which may be a more PYNQ related issue (I don't know), I am unable to try the produced .dtbo files to see if they would correctly bring in the PL device nodes.

Not even sure if the .dtbo files are correct, I tried to load overlays with the system.dtb (same directory as the system.dtbo) and it produces less but still an error. Syslog:

pynq kernel: [21277.735116] fpga_manager fpga0: writing sensors96b.bin to Xilinx ZynqMP FPGA Manager
pynq kernel: [21277.911333] create_overlay: Failed to create overlay (err=-22)

From the documentation of the PYNQ images and BSP for Ultra96 there is no mention of how to access the PL UART IP of the sensor96b design in the expected way, with a driver. This would be okay if the devicetree automatically updated and configured drivers but it doesn't seem to. PYNQ supplies basic MMIO access to PL IP, and it does work for verifying that the UART IP are there. However, this isn't any better than just mmap'ing /dev/mem.

Any guidance on this matter would be very much appreciated.

I2C1 not Operating at 400KHz

Device tree file pcw.dtsi indicates i2c1 clock frequency of 400000.
Device tree file avnet-ultra96-rev1.dtsi indicates i2c1 clock frequency of 100000.
After build, i2c1operates at 100000. dtc extraction of device tree after build of Pynq 2.7.0 confirms i2c1 clock is being set to 100KHz.
Assumption is that pcw.dtsi was intended to change this parameter to 400000.

Failure to boot when using STM32 sensor mezzanine

I'm running into an issue when trying to boot my Ultra96-v2 with a PYNQ image while the STM32 sensor mezzanine is attached.

I've verified that PYNQ works with the "original" sensor mezzanine, as well as without one at all. However, if I try to attach the STM32 variant, the board doesn't boot. (No display, no USB serial port, the fan runs, but the 4 status LEDs all stay a solid green)

What's more it works perfectly fine when using the out-of-box image.

Mezzanine in question:
https://www.96boards.org/product/stm32/