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A question about Arm core Neoverse V1 - "mix code freely"

Hi, Ashok

May I ask you a question? In the material on this link, there is a quote in one of the slides "With SVE developers can mix code freely between narrow and wide vector execution”.

Do you know what exactly "mix code freely" means? I don't think it is VLA Programming cause it is not using that word. Then what is it? :)

I learned from your Wiki that V1 has 2*256-bit pipelines. Does this has any relationship with "mix code freely"? How a developer can take advantage of two 256b SVE pipelines?

Thank you very much.
BR,
Guodong Xu

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