animeshk-me / circuit-paths-enumerator

This script lists out all paths from inputs to outputs of an input combinational circuit in the form of structural/gate-level modelling in verilog. The BFS graph algorithm is used.

Circuit Paths Enumerator

This project enumerates all the paths from inputs to outputs of a given combinational circuit.

Overview of the Project:

• This is a python script which reads and parses a verilog file as input
• Then it creates a directed acyclic graph(DAG) to represent the equivalent combinational circuit.
• Then it enumerates all the possible paths from the circuit inputs to outputs recursively.
• The graph algorithm Breadth First Search(BFS) is used for this purpose.

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Constraints:

This programs accepts a 'valid' verilog file as an input. A verilog file is 'valid' if,

• It uses only the primitive gates, i.e. or, and, not, nor, xor, xnor and nand. These gates can have n inputs and 1 output.
• It doesn't use any external verilog module.(i.e. `include's will not work)
• It should look like this:

(Notice the absence of any tabs before any line of the file)

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Execution method:

• Run this command

    $ python3 enumerator.py
  

• A prompt opens, enter the file name. The verilog file should satisfy above constraints

    $ Enter a valid verilog file name: <filename>
  

• It prints out the graph equivalent to the combinational circuit specified in the form of the input verilog file and also enumerates all the paths from inputs to outputs.

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