The project is about design, implementation and testing of a 16-bit multi-cycle RISC processor. Each instruction is of 16-bit (2 bytes) and passes through five cycles (max) IF, ID, EX, MEMR and WB similar to the standard MIPS Processor.
anantanurag / csf342-16bit-proc Goto Github PK
View Code? Open in Web Editor NEW16 Bit RISC Processor
License: GNU General Public License v3.0