albertoparravicini / approximate-spmv-topk Goto Github PK
View Code? Open in Web Editor NEWPublic repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"
License: MIT License
Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"
License: MIT License
I have not modified any source code, but when I use the following command to run the host,
cd build/hw/xilinx_u280_xdma_201920_3
./spmv_coo_hbm_topk_multicore_mega_main -x spmv_bscsr_top_k_main.xclbin -d -m ../../../data/matrices_for_testing/matrix_10000_1024_20_gamma.mtx -k 100 -t 30
the output shows:
----------------
Mean FPGA execution time=8.268e-05±1.64e-05 ms
Mean full FPGA execution time=0.09658±0.01358 ms
Mean read-back time=115.1±1.64e-05 ms
Mean error=100±0
Mean precision=0.01393±0.008168
----------------
Thanks for your insightful and solid research!
I encountered some problems while trying to compile this project in ubuntu 20.04 with vitis 2021.1.
First, it seems that the --nk and --sp options have been decrypted in vitis 2021.1, I updated it following https://www.xilinx.com/developer/articles/using-configuration-files-to-control-vitis-compilation.html , and then I encountered it,
https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/compile-error-for-pragoffset=slavema-HLS-INTERFACE-bundle-Vitis-2020-2/td-p/1203908, I followed the steps in the forums, removed the offset=slave options, and finally vitis tells me it cannot generate rtl files, with no other clue.
Can u checkout the hls log and point out the potential problems?
Thanks.
vitis_hls.log
Update:
It seems that this problem occurs because #pragma hls data_pack is no longer supported in the newest version of vitis
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