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Must-have verilog systemverilog modules
Convolutional accelerator kernel, target ASIC & FPGA
使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目
数字IC相关资料
This repository hosts the code for an FPGA based accelerator for convolutional neural networks
Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
**大学李宏毅教授课程作业练习
RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.
(Unoffical)人工智能实践:Tensorflow笔记
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
A small, light weight, RISC CPU soft core
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
A declarative, efficient, and flexible JavaScript library for building user interfaces.
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TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.