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undercover-attack

Detecting Adversarial Examples via Undercover Attack

usb3_mipi_csi2_rx_v2_crosslink_nx

MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX. Gbps UVC Video Stream Over USB 3.0 with Cypress FX3

usb_c_industrial_camera_fpga_usb3

Source and Documentation files for USB C Industrial Camera Project, This repo contains source for PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

usystolic-sim

A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.

v831-npu

Reverse engineering the V831 npu

vectorcgra

verigpu

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

verilog-axi

Verilog AXI components for FPGA implementation

verilog-ethernet

Verilog Ethernet components for FPGA implementation

verilog-math

Mathematical Functions in Verilog

verilog-pcie

Verilog PCI express components

vitis-ai

vlib

A Verilog library of components commonly used to build more complex RTL designs

vortex

vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research

warp

A Python framework for high performance GPU simulation and graphics

wbuart32

A simple, basic, formally verified UART controller

weighted-round-robin-arbiter

Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components

wildnav

GNSS-Free drone navigation and localization in the wild

winocnn

An HLS based winograd systolic CNN accelerator

wujian100_open

IC design and development should be faster，simpler and more reliable

xulin-f

A Data-Centric Accelerator for High-Performance Hypergraph Processing

zsim

A fast and scalable x86-64 multicore simulator

zynq_cam_isp_demo

基于verilog实现了ISP图像处理IP