Comments (2)
I was thinking about a JSON+XUnit export and have a VUnit attribute on tests referencing relevant LRM section. The output would be a table with test case name + pass/fail + LRM link. Now that we have two simulators that we can use online we should have a column for each. Just like in that SystemVerilog example. We should also generate a HTML report for those running offline with their own simulator. Pandoc on the Markdown maybe. My current client uses GitHub and there I use this technique to create a test to spec mapping which the CI pushes to the GitHub Wiki. I didn't know about this summary feature so let's give it a try. Will you? I better focus on the VUnit support for NVC.
from compliance-tests.
We are talking about different use cases. The GitHub Step Summary is useful for someone watching a CI run through the web. So clicking on any of the runs listed in https://github.com/VHDL/Compliance-Tests/actions.
Generating JSON, XUnit or HTML cannot be done there. That needs an additional step, which might be a) downloading an artifact and/or b) pushing it somewhere (gh-pages, wiki, anywhere else).
In ghdl/extended-tests, we use pytest pytest-reporter pytest-reporter-html1
and we upload the HTML report to gh-pages (see ghdl.github.io/extended-tests).
Moreover, in GHDL we pregenerate the content of a subdir and then include it in the doc: https://github.com/ghdl/ghdl/blob/master/doc/conf.py#L114-L115. Hence, we might convert VUnit's XUnit output to HTML and include it in the documentation.
from compliance-tests.
Related Issues (19)
- What kinds of compliance test to collect? HOT 7
- Support tracking: GHDL [VHDL-2008] HOT 1
- Using Python3 in Vunit HOT 4
- Proposed Labels HOT 2
- LCS2019: automatic issue generation, MWE update and testing tools HOT 2
- What is next? HOT 11
- Testing Stops at First Compilation Error HOT 2
- VHDL-2019: Composites of Protected Types (LCS-2016-014)
- VHDL-2019: Access Types to Protected Types and Composites of Protected Types (LCS-2016-014a)
- VHDL-2019: Relax Library Requirement on Configurations (LCS-2016-023) HOT 1
- VHDL-2019: Attributes for PSL (LCS-2016-043) HOT 2
- VHDL-2019: Garbage Collection test exhausts all memory to fail HOT 1
- Co-Simulation Tests
- Convert XUnit report to HTML and upload it as a section of the doc
- VHDL-2008: Generic packages on entity should test all cases
- Clearer Usage Instructions HOT 2
- Compliance tests dependent on vunit HOT 17
- Generic in tb_071a.vhd is not mapped
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from compliance-tests.