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accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

basic_verilog

Must-have verilog systemverilog modules

carnd-lenet-lab

Implement the LeNet deep neural network model with TensorFlow.

cnn-fpga

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

cnn_open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

convolution_network_on_fpga

CNN acceleration on virtex-7 FPGA with verilog HDL

core_ddr3_controller

A DDR3 memory controller in Verilog for various FPGAs

cvpr2021-papers-with-code

CVPR 2021 论文和开源项目合集

dagm2007-to-voc

Generate VOC format datasets from defective images in DAGM2007 dataset.

deep-learning-for-image-processing

deep learning for image processing including classification and object-detection etc.

deep_learning_object_detection

A paper list of object detection using deep learning.

fpga

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

fpga_based_cnn

FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

fpgaandcnn

基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现

github-slideshow

A robot powered training repository :robot:

hardware-cnn

A convolutional neural network implemented in hardware (verilog)

learn-fpga

Learning FPGA, yosys, nextpnr, and RISC-V

learning-nvdla-notes

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:[email protected]

mmdetection

OpenMMLab Detection Toolbox and Benchmark

mnist-lesson

object-detection-paper

Summaries of the papers on Object detection

oh

Verilog library for ASIC and FPGA designers

openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

pipecnn

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

pytorch-yolo-v3

A PyTorch implementation of the YOLO v3 object detection algorithm

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

sdram-controller

Verilog SDRAM memory controller

sm3_core

surface-defect-detection

缺陷检测文献记录

ustc-rvsoc

FPGA-based RISC-V CPU+SoC.