Anticheat (question) about pcileech-fpga

[ufrisk]

No, you are correct, the current latency (best case) for small reads are in the millisecond range. (not considering load/setup times for PCILeech the initial USB connection).

Please look into my memory process file system - it mounts virtual memory (translates virtual2physical on the fly using page table walks). As-is right now I suspect it's quite useless though since I added so much caching to it that it will most probably be useless for this scenario. I suspect that if the caching for virtual memory read/write were to be removed (not page table caching) it will be useful, even though I suspect it would still be in the 10ms range. http://blog.frizk.net/2018/03/memory-process-file-system.html

If you need to move beyond ms the way to go about it is probably to load some code onto the FPGA board itself. It's an obvious future development but I suspect there will be so much work around it that I won't be able to do it due to time constraints. This would move latency down to 100uS range.

The PCIeScreamer may be stable enough if you are lucky with your system; I suspect you will run into problems for this use scenario though.