Question about arbitrary precision support about berkeley-hardfloat

[aswaterman]

This library hasn't been verified for sizes other than the IEEE ones, but we generally expect that it will work for other sizes, under some constraints. For example, if 2^expWidth falls below sigWidth + some constant I'm not totally sure of, it will not work.

[noureddine-as]

Thank you for the answer @aswaterman . Is there any documentation on those requirements? I saw two require statements in the FPU.scala but not sure if there are any other dependencies/assumptions that aren't mentioned?

Just another question more related to Rocket Chip FPU implementation than this library, the FPU.scalais designed in a way that the F and D extensions are both included when an RV64 is equipped with FPU. I'm wondering if it's possible (and if it makes sense) for me to make it take only the F or only the D for example? e.g. to construct a RV64IMAFC (or RV64IMADC) instead of RV64IMAFDC

Thanks,
Best regards.

[aswaterman]

Sorry, probably no documentation.

F-only is supported. D-only is not supported (it’s not allowed by the ISA).

[noureddine-as]

Okay, thanks for these informations @aswaterman.

[aswaterman]

You're welcome!