Missing delay after loading spioverjtag? about openfpgaloader

[trabucayre]

There is a delay after JTSTART and I have already tried to flash spartan7 without seeing this type of issue (I have digilent arty s7 50).
The delay is based on artix7 datasheet so maybe to small for the device you use (but this code is used for biggest devices without any problem...).
I have to look at bsd files to see if a longer delay is required or if there is a regression somewhere.

[UweBonnes]

Maybe
attribute INSTRUCTION_CAPTURE of XC6VLX130T_FF784 : entity is
-- Bit 5 is 1 when DONE is released (part of startup sequence)
-- Bit 4 is 1 if house-cleaning is complete
-- Bit 3 is ISC_Enabled
-- Bit 2 is ISC_Done
"XXXXXXXX01";
is usefull to wait for "DONE"?

[trabucayre]

I have seen your commit and UG470. It look like but there is maybe a limitation for xc7v ?

[trabucayre]

Do you plan to open a PR to integrate this?

[UweBonnes]

Yes, but I must get back the hardware. Will try soon.

[trabucayre]

Thanks!
In fact I have notice on ug470, a poll is also required after JPROGRAM (it's not to request this modification ;-) )

[UweBonnes]

Fixed by #440