Comments (5)
@secworks I tried building with ENABLE_DIV=1
, result is this increased device utilisation, from:
Info: ICESTORM_LC: 4446/ 5280 84%
to
Info: ICESTORM_LC: 5189/ 5280 98%
Maybe this is not great at all, considering that the space might be needed for other things, like a blake2 in hw? Or what else we've had on the table.
from tillitis-key1.
Maybe we can just avoid DIV/REM being used? If so, then eating up more space in the FPGA seems like really bad idea. In this case, would it be fine for now to check for DIV/REM in the final ELF, and fail if they are present? And once we get onto clang 16 (or what is needed), we can benefit from Zmmul extension.
from tillitis-key1.
Ah yes, we should try to use a DIV and see what happens, crash or not?
from tillitis-key1.
@secworks I tried building with
ENABLE_DIV=1
, result is this increased device utilisation, from:Info: ICESTORM_LC: 4446/ 5280 84%
to
Info: ICESTORM_LC: 5189/ 5280 98%
Maybe this is not great at all, considering that the space might be needed for other things, like a blake2 in hw? Or what else we've had on the table.
Interesting, I don't see the change in utilization when I enable DIV (which I expect to get).
To answer the the use of resources - if apps crash when using a div instruction that would make this a high priority, and thus a good use of resources. As long as we get good clock frequency with 98% fill rate I would be happy. I don't see any things more important to add right now.
Blake2s in HW will require more resources that we have as it is before enabling DIV.
from tillitis-key1.
Fixed in commit f09ff87
from tillitis-key1.
Related Issues (20)
- Clean up lint warnings. Again HOT 2
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