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ariane-sdk

Ariane SDK containing RISC-V tools and Buildroot

aws-fpga-f1-u200

bitwise

Terminal based bit manipulator in ncurses

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

chisel-memory

chisel3

Chisel 3: A Modern Hardware Design Language

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

cocotb-test

Unit testing for cocotb

corescore

CoreScore

cpython

The Python programming language

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

dma_ip_drivers

Xilinx QDMA IP Drivers

edalize

An abstraction library for interfacing EDA tools

firemarshal

Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

firesim

FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud

flora

A partial reconfiguration floorplanner for Xilinx FPGAs.

haps

hls4ml

Machine learning in FPGAs using HLS

junest

The lightweight Arch Linux based distro that runs, without root privileges, upon any Linux distro

libsystemctlm-soc

linux

Linux kernel source tree

litex

Build your hardware, easily!

microwatt

A tiny Open POWER ISA softcore written in VHDL 2008

multicachesim

A Coherent Multiprocessor Cache Simulator Based on the SuperESCalar Cache Model

nesteddfx

This is repo to show how to use nested DFX on ZCU102 board

omnixtendendpoint

Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.

openpiton

The OpenPiton Platform

opensbi

RISC-V Open Source Supervisor Binary Interface

opentitan

OpenTitan: Open source silicon root of trust

piton-linux

Linux Kernel for OpenPiton