Another AVX2 assembly issue about uasm

[john-terraspace]

No worries!

These are totally new so it’s progress !

We’ll get onto these ASAP.

From: gwoltman [mailto:[email protected]]
Sent: 26 September 2016 01:06 AM
To: Terraspace/HJWasm [email protected]
Subject: [Terraspace/HJWasm] Another AVX2 assembly issue (#33)

Sorry to be a pain....

First the bugs:

vpsllq ymm11, ymm11, xmm0
vpsllq zmm11, zmm11, xmm0

is not assembling. The Intel manual and ML64 say this is OK.

ML64:
vpmuludq ymm8, ymm6, ymmword ptr [r11+520H] ; 392F _ C4 41 4D: F4. 83, 00000520
vpsrlq ymm9, ymm7, xmmword ptr [r11+2C0H] ; 3A13 _ C4 41 45: D3. 8B, 000002C0
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpmuludq ymm8, ymm6, ymmword ptr [rbx+520H] ; 3930 _ C4 61 CD: F4. 83, 00000520
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, xmmword ptr [rbx+2C0H] ; 3A14 _ C4 61 C5: D3. 8B, 000002C0
Note that 'r11' turned into 'rbx'

ML64:
vptest ymm8, ymm6 ; 3FC2 _ C4 62 7D: 17. C6
HJWASM:
vptest ymm8, ymm14 ; 3FC7 _ C4 42 7D: 17. C6

Now some oddities:

ML64:
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C5 B5: 73. D7, 03
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C4 E1 B5: 73. D7, 03
ML64 assembled this into one fewer byte.

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[john-terraspace]

Hi,

So-far they’re all fixed apart from:

vpsllq ymm11, ymm11, xmm0

vpsllq zmm11, zmm11, xmm0

We should have these done tomorrow and then will update the packages again.

John

From: gwoltman [mailto:[email protected]]
Sent: 26 September 2016 01:06 AM
To: Terraspace/HJWasm [email protected]
Subject: [Terraspace/HJWasm] Another AVX2 assembly issue (#33)

Sorry to be a pain....

First the bugs:

vpsllq ymm11, ymm11, xmm0
vpsllq zmm11, zmm11, xmm0

is not assembling. The Intel manual and ML64 say this is OK.

ML64:
vpmuludq ymm8, ymm6, ymmword ptr [r11+520H] ; 392F _ C4 41 4D: F4. 83, 00000520
vpsrlq ymm9, ymm7, xmmword ptr [r11+2C0H] ; 3A13 _ C4 41 45: D3. 8B, 000002C0
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpmuludq ymm8, ymm6, ymmword ptr [rbx+520H] ; 3930 _ C4 61 CD: F4. 83, 00000520
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, xmmword ptr [rbx+2C0H] ; 3A14 _ C4 61 C5: D3. 8B, 000002C0
Note that 'r11' turned into 'rbx'

ML64:
vptest ymm8, ymm6 ; 3FC2 _ C4 62 7D: 17. C6
HJWASM:
vptest ymm8, ymm14 ; 3FC7 _ C4 42 7D: 17. C6

Now some oddities:

ML64:
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C5 B5: 73. D7, 03
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C4 E1 B5: 73. D7, 03
ML64 assembled this into one fewer byte.

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[john-terraspace]

; Note: Prefix bit or byte has no meaning in this context
vpmuludq ymm8, ymm6, ymmword ptr [rbx+520H] ; 3930 _ C4 61 CD: F4. 83, 00000520
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, xmmword ptr [rbx+2C0H] ; 3A14 _ C4 61 C5: D3. 8B, 000002C0

In the case of this prefix bit the (CD/C5) just have bit 7 set, which is ignored so this is not a problem.

From: gwoltman [mailto:[email protected]]
Sent: 26 September 2016 01:06 AM
To: Terraspace/HJWasm [email protected]
Subject: [Terraspace/HJWasm] Another AVX2 assembly issue (#33)

Sorry to be a pain....

First the bugs:

vpsllq ymm11, ymm11, xmm0
vpsllq zmm11, zmm11, xmm0

is not assembling. The Intel manual and ML64 say this is OK.

ML64:
vpmuludq ymm8, ymm6, ymmword ptr [r11+520H] ; 392F _ C4 41 4D: F4. 83, 00000520
vpsrlq ymm9, ymm7, xmmword ptr [r11+2C0H] ; 3A13 _ C4 41 45: D3. 8B, 000002C0
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpmuludq ymm8, ymm6, ymmword ptr [rbx+520H] ; 3930 _ C4 61 CD: F4. 83, 00000520
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, xmmword ptr [rbx+2C0H] ; 3A14 _ C4 61 C5: D3. 8B, 000002C0
Note that 'r11' turned into 'rbx'

ML64:
vptest ymm8, ymm6 ; 3FC2 _ C4 62 7D: 17. C6
HJWASM:
vptest ymm8, ymm14 ; 3FC7 _ C4 42 7D: 17. C6

Now some oddities:

ML64:
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C5 B5: 73. D7, 03
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C4 E1 B5: 73. D7, 03
ML64 assembled this into one fewer byte.

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[john-terraspace]

Hi,

Packages have been updated and are available on the site for download. All the listed issues are resolved.

From: gwoltman [mailto:[email protected]]
Sent: 26 September 2016 01:06 AM
To: Terraspace/HJWasm [email protected]
Subject: [Terraspace/HJWasm] Another AVX2 assembly issue (#33)

Sorry to be a pain....

First the bugs:

vpsllq ymm11, ymm11, xmm0
vpsllq zmm11, zmm11, xmm0

is not assembling. The Intel manual and ML64 say this is OK.

ML64:
vpmuludq ymm8, ymm6, ymmword ptr [r11+520H] ; 392F _ C4 41 4D: F4. 83, 00000520
vpsrlq ymm9, ymm7, xmmword ptr [r11+2C0H] ; 3A13 _ C4 41 45: D3. 8B, 000002C0
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpmuludq ymm8, ymm6, ymmword ptr [rbx+520H] ; 3930 _ C4 61 CD: F4. 83, 00000520
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, xmmword ptr [rbx+2C0H] ; 3A14 _ C4 61 C5: D3. 8B, 000002C0
Note that 'r11' turned into 'rbx'

ML64:
vptest ymm8, ymm6 ; 3FC2 _ C4 62 7D: 17. C6
HJWASM:
vptest ymm8, ymm14 ; 3FC7 _ C4 42 7D: 17. C6

Now some oddities:

ML64:
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C5 B5: 73. D7, 03
HJWASM:
; Note: Prefix bit or byte has no meaning in this context
vpsrlq ymm9, ymm7, 3 ; 38B8 _ C4 E1 B5: 73. D7, 03
ML64 assembled this into one fewer byte.

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[gwoltman]

Above items fixed (except prefix bit or byte warnings). I'll re-open that as a separate issue.