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Name: TCal
Type: User
Company: MatX
Bio: Currently at MatX doing ML / compiler stuff.
Twitter: tcal_x
Location: California
Name: TCal
Type: User
Company: MatX
Bio: Currently at MatX doing ML / compiler stuff.
Twitter: tcal_x
Location: California
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
RISC-V FPGA SIG Custom Function Unit Specification
Building and deploying container images for open source electronic design automation (EDA)
Programmer for the Lattice ECP5 series, making use of FTDI based adaptors
Bootloader for Fomu
Support files for participating in a Fomu workshop
This repository contains small example designs that can be used with the open source icestorm flow.
This repository contains icebreaker examples for nmigen, a refresh of migen.
Composable transformations of Python+NumPy programs: differentiate, vectorize, JIT to GPU/TPU, and more
KLayout Main Sources
Small footprint and configurable SPI core
Build your hardware, easily!
LiteX boards files
An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!
TF Lite demo on LiteX/VexRiscv soft RISC-V SoC on a Digilent Arty board
Random stuff -- small demos/tutorials, etc.
nextpnr portable FPGA place and route tool
A tutorial for using nmigen
Documenting the Xilinx 7-series bit-stream format.
Project X-Ray Database: XC7 Series
Python module containing verilog files for vexriscv cpu (for use with LiteX).
Scala based HDL
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Documentation for SymbiFlow
Examples designs for showing different ways to use SymbiFlow toolchains.
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The blog of tcal-x
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