Comments (3)
strcpy
, memset
and memcpy
built with newlib are disassembled below:
000461f8 <strcpy>:
461f8: 00050793 mv a5,a0
461fc: 0005c703 lbu a4,0(a1)
46200: 00178793 addi a5,a5,1
46204: 00158593 addi a1,a1,1
46208: fee78fa3 sb a4,-1(a5)
4620c: fe0718e3 bnez a4,461fc <strcpy+0x4>
46210: 00008067 ret
00044cf8 <memcpy>:
44cf8: 00050313 mv t1,a0
44cfc: 00060e63 beqz a2,44d18 <memcpy+0x20>
44d00: 00058383 lb t2,0(a1)
44d04: 00730023 sb t2,0(t1)
44d08: fff60613 addi a2,a2,-1
44d0c: 00130313 addi t1,t1,1
44d10: 00158593 addi a1,a1,1
44d14: fe0616e3 bnez a2,44d00 <memcpy+0x8>
44d18: 00008067 ret
00044d1c <memset>:
44d1c: 00050313 mv t1,a0
44d20: 00060a63 beqz a2,44d34 <memset+0x18>
44d24: 00b30023 sb a1,0(t1)
44d28: fff60613 addi a2,a2,-1
44d2c: 00130313 addi t1,t1,1
44d30: fe061ae3 bnez a2,44d24 <memset+0x8>
44d34: 00008067 ret
We may detect and replace with macro fusion instructions instead.
from rv32emu.
In lightrec, its optimizer.c would replace MIPS memset instruction sequence with host counterpart.
static const u32 memset_code[] = {
0x10a00006, // beqz a1, 2f
0x24a2ffff, // addiu v0,a1,-1
0x2403ffff, // li v1,-1
0xac800000, // 1: sw zero,0(a0)
0x2442ffff, // addiu v0,v0,-1
0x1443fffd, // bne v0,v1, 1b
0x24840004, // addiu a0,a0,4
0x03e00008, // 2: jr ra
0x00000000, // nop
};
static int lightrec_replace_memset(struct lightrec_state *state, struct block *block)
{
unsigned int i;
union code c;
for (i = 0; i < block->nb_ops; i++) {
c = block->opcode_list[i].c;
if (c.opcode != memset_code[i])
return 0;
if (i == ARRAY_SIZE(memset_code) - 1) {
/* success! */
pr_debug("Block at PC 0x%x is a memset\n", block->pc);
block_set_flags(block,
BLOCK_IS_MEMSET | BLOCK_NEVER_COMPILE);
/* Return non-zero to skip other optimizers. */
return 1;
}
}
return 0;
}
from rv32emu.
Close via #196
from rv32emu.
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