sumukhathreya,Sumukha S Athreya,github

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Name: Sumukha S Athreya

Type: User

Company: International Institute of Information Technology

Bio: Electronics Engineering graduate | Digital VLSI Design & Verification enthusiast | Passionate about hardware design and verification

Location: Bengaluru

Hi there 👋

Welcome to My GitHub Profile! 👋 About Me ℹ️ I am a recent Electronics Engineering graduate currently upskilling in Digital VLSI Design and Verification at IIIT Bangalore. My passion lies in hardware design and verification, and I am eager to contribute to innovative projects in this field. 🔌💡 Skills 🛠️ Digital VLSI Design 💻 Verification Techniques 🧪 Hardware Description Languages (Verilog, VHDL) 📐 FPGA Programming 🚀 Scripting Languages (TCL) 🐍

Projects 🚀:

SOS Alert System for Women Safety
Design and Development of a Cost-Effective 3-D Printer
Design and Verification of a 16-bit RISC-V Processor using Verilog

Currently enhancing my skills in Digital VLSI Design and Verification at the K-VLSI training programme conducted by IIIT Bangalore. Excited to apply my knowledge to real-world projects and collaborate with like-minded individuals. 🌟 Contact Me 📧 [email protected] Feel free to reach out for collaborations, project ideas, or just to connect! Let's innovate together. 🚀 Thank you for visiting my GitHub profile! 🚀✨

Sumukha S Athreya's Projects

16-bit_risc-v_processor

This project involves creating a multi-stage pipeline architecture, including instruction fetch, decode, execute, memory, and write-back stages.

3-d_printer

Design and Development of a Cost-Effective 3-D Printer

sos_alert_system

The project aims to enhance safety for victims by providing a simple SOS push button. When pressed, it sends a message with the victim’s location and a help request to loved ones and the police. This solution can be integrated into smart watches, mobile covers, and other devices, using modern PCB design techniques to reduce costs.