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Hey there! My name is Suhas and I develop hardware using the RISC-V Instruction Set Architecture. I also use Rust to build lightweight Electronic Design Automation tools for developers to use and test their hardware.

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Suhas KV's Projects

cayde icon cayde

cayde is 32-bit RISC-V core written in SystemVerilog

ccn-lab icon ccn-lab

This repository contains the files required for the Computer Communication Networks course for 5th semester.

cft icon cft

Circuit Fault Tester: This tool will process a netlist and process the faults in the netlist.

control_systems_matlab icon control_systems_matlab

This repo consists of all the MATLAB code for the Control Systems course of the 4th Semester ECE department.

digital-com-matlab icon digital-com-matlab

This repository contains MATLAB files for the Digital Communication course of 4th semester of ECE.

dsp_lab icon dsp_lab

This repository consists of all the MATLAB programs of the Principles of Digital Signal Processing Laboratory of 4th semester of ECE department.

eleventy-duo icon eleventy-duo

Eleventy Duo is a minimal and beautiful Eleventy theme for personal blogs.

gravity icon gravity

gravity is a p2p file transfer tool.

intel-fpga icon intel-fpga

This repo contains SV and Sycl code for the FPGA Academy using Intel FPGAs on the oneAPI platform.

litex icon litex

Build your hardware, easily!

nospoilers icon nospoilers

No Spoilers is a simple GUI TV show search engine. Users can search and store TV shows in watchlists as well as get updates on new episodes of a certain show.

rapat icon rapat

RAPAT - Router and Access Point Automated Testing

resourcepolice icon resourcepolice

ResourcePolice is a simple system resource monitoring tool for all platforms.

ripes_riscv_asm icon ripes_riscv_asm

This repository consists of RISC-V assembly code, C code for simulators and FPGA HW implementations.

riscv-learn icon riscv-learn

This repo consists of some RISC-V instructions written in SystemVerilog. They are definitely not to be compared to the real IS as I am just trying to understand them at this point.

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