won't work in fast mode about adafruit_tftlcd_8bit_stm32

[stevstrong]

Without seeing what have you changed it is hard to comment.

[johncblacker]

OK, I'll show you my version of the .h file below:

</*****************************************************************************/
// Define pins and Output Data Registers
/*****************************************************************************/
// Data port
//#define TFT_DATA_PORT	GPIOA  //JCB comment
#define TFT_DATA_PORT GPIOA  // jcb changed from GPIOB


// Data bits/pins
#define TFT_DATA_SHIFT 0 // take the lower bits/pins 0..7
//#define TFT_DATA_SHIFT 8 // take the higher bits/pins 8..15

//Control pins |RD |WR |RS |CS |RST|
#define TFT_CNTRL_PORT	GPIOB   //jcb changed form GPIOA
#define TFT_RD			PB6
#define TFT_WR			PB5
#define TFT_RS			PB4
#define TFT_CS			PB3

#define TFT_RD_MASK		BIT0 // digitalPinToBitMask(TFT_RD) //
#define TFT_WR_MASK		BIT1 // digitalPinToBitMask(TFT_WR) //
#define TFT_RS_MASK		BIT2 // digitalPinToBitMask(TFT_RS) //
#define TFT_CS_MASK		BIT3 // digitalPinToBitMask(TFT_CS) //

#define TFT_RST			PB7

// CHANGED THE FOLLOWING STATMENT TO MAKE IT WORK - JCB **************************
#define SLOW_WRITE 1....   // set to 1 for legacy slow write (using individual digitalWrite()s

/*****************************************************************************/
// LCD controller chip identifiers
#define ID_932X    0
#define ID_7575    1
#define ID_9341    2
#define ID_HX8357D    3
#define ID_9338    4
#define ID_UNKNOWN 0xFF

/*****************************************************************************/
#define TFTWIDTH   240
#define TFTHEIGHT  320

// Initialization command tables for different LCD controllers
#define TFTLCD_DELAY 0xFF

// For compatibility with sketches written for older versions of library.
// Color function name was changed to 'color565' for parity with 2.2" LCD
// library.
#define Color565 color565

/*****************************************************************************/
#define	BLACK   0x0000
#define	BLUE    0x001F
#define	RED     0xF800
#define	GREEN   0x07E0
#define CYAN    0x07FF
#define MAGENTA 0xF81F
#define YELLOW  0xFFE0
#define WHITE   0xFFFF


	#define RD_ACTIVE    digitalWrite(TFT_RD, LOW)
	#define RD_IDLE      digitalWrite(TFT_RD, HIGH)
#if SLOW_WRITE
	// use old definition, standard bit toggling, low speed
	#define WR_ACTIVE    digitalWrite(TFT_WR, LOW)
	#define WR_IDLE      digitalWrite(TFT_WR, HIGH)
	#define CD_COMMAND   digitalWrite(TFT_RS, LOW)
	#define CD_DATA      digitalWrite(TFT_RS, HIGH)
	#define CS_ACTIVE    digitalWrite(TFT_CS, LOW)
	#define CS_IDLE      digitalWrite(TFT_CS, HIGH)
	#define CS_ACTIVE_CD_COMMAND	{ CS_ACTIVE; CD_COMMAND; }
#else
	// use fast bit toggling, very fast speed!
extern gpio_reg_map * cntrlRegs;
	#define WR_ACTIVE				{ cntrlRegs->BRR  = TFT_WR_MASK; }
	#define WR_IDLE					{ cntrlRegs->BSRR = TFT_WR_MASK; }
	#define CD_COMMAND				{ cntrlRegs->BRR  = TFT_RS_MASK; }
	#define CD_DATA					{ cntrlRegs->BSRR = TFT_RS_MASK; }
	#define CS_ACTIVE				{ cntrlRegs->BRR  = TFT_CS_MASK; }
	#define CS_IDLE					{ cntrlRegs->BSRR = TFT_CS_MASK; }
	#define CS_ACTIVE_CD_COMMAND	{ cntrlRegs->BRR  = (TFT_CS_MASK|TFT_RS_MASK); }
#endif

#define WR_STROBE { WR_ACTIVE; WR_IDLE; }

extern uint8_t read8_(void);
#define read8(x) ( x = read8_() )

extern gpio_reg_map * dataRegs;

#if (TFT_DATA_SHIFT==0)
  //#warning "Using lower data nibble..."
	// set the pins to input mode
	#define setReadDir() ( dataRegs->CRL = 0x88888888 )	// set the lower 8 bits as input
	// set the pins to output mode
	#define setWriteDir() ( dataRegs->CRL = 0x33333333 )	// set the lower 8 bits as output

    // set pins to output the 8 bit value
    #if SLOW_WRITE
     inline void write8(uint8_t c) { /*Serial.print(" write8: "); Serial.print(c,HEX); Serial.write(',');*/

  // CHANGED THE NEXT SET OF STATMENTS FROM PBx TO PAx - jcb ************************
 
    					digitalWrite(PA0, (c&BIT0)?HIGH:LOW);
    					digitalWrite(PA1, (c&BIT1)?HIGH:LOW);
    					digitalWrite(PA2, (c&BIT2)?HIGH:LOW);
    					digitalWrite(PA3, (c&BIT3)?HIGH:LOW);
    					digitalWrite(PA4, (c&BIT4)?HIGH:LOW);
    					digitalWrite(PA5, (c&BIT5)?HIGH:LOW);
    					digitalWrite(PA6, (c&BIT6)?HIGH:LOW);
    					digitalWrite(PA7, (c&BIT7)?HIGH:LOW);
    					WR_STROBE; }
    #else
      #define write8(c) { dataRegs->BSRR = (uint32_t)(0x00FF0000 + ((c)&0xFF)); WR_STROBE; }
      // inline void write8(uint8_t d) { dataRegs->BSRR = (uint32_t)(0x00FF0000 + d); WR_STROBE; };
    #endif
#elif (TFT_DATA_SHIFT==8)
  #warning "Using high data nibble..."
	// set the pins to input mode
	#define setReadDir() ( dataRegs->CRH = 0x88888888 )	// set the upper 8 bits as input
	// set the pins to output mode
	#define setWriteDir() ( dataRegs->CRH = 0x33333333 )	// set the lower 8 bits as output

    // set pins to output the 8 bit value
    #if SLOW_WRITE

  // CHANGED THE NEXT SET OF STATMENTS TO MAKE IT WORK - from PBx TO PAx
     inline void write8(uint8_t c) { /*Serial.print(" write8: "); Serial.print(c,HEX); Serial.write(',');*/
    					digitalWrite(PA0, (c&BIT0)?HIGH:LOW);
    					digitalWrite(PA1, (c&BIT1)?HIGH:LOW);
    					digitalWrite(PA2, (c&BIT2)?HIGH:LOW);
    					digitalWrite(PA3, (c&BIT3)?HIGH:LOW);
    					digitalWrite(PA4, (c&BIT4)?HIGH:LOW);
    					digitalWrite(PA5, (c&BIT5)?HIGH:LOW);
    					digitalWrite(PA6, (c&BIT6)?HIGH:LOW);
    					digitalWrite(PA7, (c&BIT7)?HIGH:LOW);
    					WR_STROBE; }
    #else
      #define write8(c) {  dataRegs->BSRR = (uint32_t)(0xFF000000 + (((c)&0xFF)<<TFT_DATA_SHIFT)); WR_STROBE; }
      // inline void write8(uint8_t d) { dataRegs->BSRR = (uint32_t)(0x00FF0000 + d); WR_STROBE; };
    #endif >

I have noted in the above fragment from the .h file the changes I've made. I made no changes whatsoever to the the #define write8(c)….. statements.
Hope this helps. Thanks.

jb

[stevstrong]

I think you have to adapt the TFT_XY_MASK definitions to your new control pin mapping as well.
I can't remember why I commented out the digitalPinToBitMask() macro.

[johncblacker]

Don't see "TFT_XY_MASK" anywhere in the .h file...can you point me to where the change needs to be made?
Thanks.
jb

[stevstrong]

Come on...

#define TFT_RD_MASK BIT0 // digitalPinToBitMask(TFT_RD) //
#define TFT_WR_MASK BIT1 // digitalPinToBitMask(TFT_WR) //
#define TFT_RS_MASK BIT2 // digitalPinToBitMask(TFT_RS) //
#define TFT_CS_MASK BIT3 // digitalPinToBitMask(TFT_CS) //

The mask should indicate the bit position of the port pin.
So for PB5 the mask is BIT5, PB4 is BIT4, and so on.

[johncblacker]

I'm not a STM32 guru like you, sorry. I was looking for literal TFT_XY_MASK; but, nevertheless, why would the bit position of these need to change, they don't seem to be register dependent. Are they display dependent?

[johncblacker]

The #define TFT_CNTRL_PORT GPIOB was changed from GPIOA....isn't that enough?

[stevstrong]

You don't have to be a STM32 guru to be able to determine where some defines are used in the code.

Searching for TFT_WR_MASK will lead to: https://github.com/stevstrong/Adafruit_TFTLCD_8bit_STM32/search?q=TFT_WR_MASK&unscoped_q=TFT_WR_MASK

There you see that the port register has to be written with the correct mask value for each pin. This is why is important to have the correct mask defined.

RM0008 should be your bible from now on.

[johncblacker]

Isn't that what I did here:

//Control pins |RD |WR |RS |CS |RST|
#define TFT_CNTRL_PORT GPIOB //jcb changed form GPIOA
#define TFT_RD PB6
#define TFT_WR PB5           <<<<<<-------- CHANGED THESE!
#define TFT_RS PB4
#define TFT_CS PB3
#define TFT_RD_MASK BIT0 // digitalPinToBitMask(TFT_RD) //
#define TFT_WR_MASK BIT1 // digitalPinToBitMask(TFT_WR) //
#define TFT_RS_MASK BIT2 // digitalPinToBitMask(TFT_RS) //
#define TFT_CS_MASK BIT3 // digitalPinToBitMask(TFT_CS) //

[stevstrong]

Very good. BUT YOU HAVE TO CHANGE THAT TOO !

#define TFT_RD_MASK BIT0 // digitalPinToBitMask(TFT_RD) // <<<<<< this too!
#define TFT_WR_MASK BIT1 // digitalPinToBitMask(TFT_WR) // <<<<<< this too!
#define TFT_RS_MASK BIT2 // digitalPinToBitMask(TFT_RS) // <<<<<< this too!
#define TFT_CS_MASK BIT3 // digitalPinToBitMask(TFT_CS) // <<<<<< this too!

[stevstrong]

You can try this as test only, not for working version, because this will slow down the speed.

#define TFT_RD_MASK BIT(digitalPinToBitMask(TFT_RD))
#define TFT_WR_MASK BIT(digitalPinToBitMask(TFT_WR))
#define TFT_RS_MASK BIT(digitalPinToBitMask(TFT_RS))
#define TFT_CS_MASK BIT(digitalPinToBitMask(TFT_CS))

[johncblacker]

Made the recommended change and got no data displayed on screen

[johncblacker]

Giving up on this. I’m finding my board(s) are just unreliable when booting…sometimes they work, other times they don’t. I’ve tried using the STMDUINO as boot and BMP (Black Majic Probe) and neither works reliably. I’ve tried resetting before trying to boot, after while it’s sitting in a wait to load(of course that just breaks the load because the com port does away) and nothing seems to be reliable. I loaded the generic_boot20_pc13.bin bootloader in Roger Clark’s github repository using the STM ST LINK software. I tried two different ST LINK V2 units…nothing proves reliable. The boards I’m using are the “blue pill” cheap-o’s so maybe that’s the issue. I just don’t know. I do remember, however, that a marathon of checking, changing, booting yesterday I got your module to work without the “slow” mode set to 1. So, I can only conclude the boards I’m using just don’t measure up… Thanks for your help. But if I may be so blunt as to offer a little advice…be a little more patient with folks who are asking for help. If you’re going to answer their call for help, do so without “snide” comments like: “Come on…” as something that’s obvious to you isn’t necessarily so to others. Thanks again. From: stevstrong [mailto:[email protected]] Sent: Thursday, November 22, 2018 10:42 AM To: stevstrong/Adafruit_TFTLCD_8bit_STM32 <[email protected]> Cc: John Blacker <[email protected]>; Author <[email protected]> Subject: Re: [stevstrong/Adafruit_TFTLCD_8bit_STM32] won't work in fast mode (#14) Please try this: #define TFT_RD_MASK BIT(digitalPinToBitMask(TFT_RD)) #define TFT_WR_MASK BIT(digitalPinToBitMask(TFT_WR)) #define TFT_RS_MASK BIT(digitalPinToBitMask(TFT_RS)) #define TFT_CS_MASK BIT(digitalPinToBitMask(TFT_CS)) — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#14 (comment)> , or mute the thread <https://github.com/notifications/unsubscribe-auth/AH1gAmedoW14Mn7faAD-VNkdTmP3EqdZks5uxsXDgaJpZM4Yt8Rr> . <https://github.com/notifications/beacon/AH1gAvX0HKbwANnnZwRB3dVbfzELFawzks5uxsXDgaJpZM4Yt8Rr.gif>

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