Lassen read/write registers about lassen

[Kuree]

EDIT: updated reset signal requirements.

[rdaly525]

@Kuree,

how does the following address mapping sounds:
config_addr[0:2] == BitVector[3](3) => Data0, and Data1 register
config_addr[0:2] == BitVector[3](4) => Bit0,Bit1,Bit2 registers.

[Kuree]

Sounds good.

[rdaly525]

@leonardt, I have a branch called 'config' in which I am adding these ports and this logic.

I needed to update mode.py to always output the register value along with the appropriate value based off the mode (so 2 outputs). Once I do this, I get the following error:

____________________________________________ ERROR collecting tests/test_pe.py ____________________________________________
tests/test_pe.py:38: in <module>
    pe_magma = gen_pe(magma.get_family(), use_assembler=True)
lassen/sim.py:350: in gen_pe
    PE = m.circuit.sequential(PE)
../magma/magma/ast_utils.py:75: in wrapped
    return fn(enclosing_env, *args, **kwargs)
../magma/magma/syntax/sequential.py:332: in _sequential
    stmt = rewriter.visit(stmt)
../miniconda3/envs/peak/lib/python3.7/ast.py:262: in visit
    return visitor(node)
../miniconda3/envs/peak/lib/python3.7/ast.py:326: in generic_visit
    new_node = self.visit(old_value)
../miniconda3/envs/peak/lib/python3.7/ast.py:262: in visit
    return visitor(node)
../magma/magma/syntax/sequential.py:43: in visit_Call
    assert len(outputs) == 1, f"Expected one output: {outputs}"
E   AssertionError: Expected one output: [RegisterMode_inst0.O0, RegisterMode_inst0.O1]

[leonardt]

@rdaly525 sequential only supports one output, I'll have to add that feature to magma, it may take some time.

[leonardt]

Okay magma branch sequential-multiple-outputs adds initial support for this, but having a hard time testing because it avoids the above error but gets to

  File "/Users/lenny/repos/magma/magma/ast_utils.py", line 42, in compile_function_to_file
    exec(compile(astor.to_source(tree), filename=file_name, mode="exec"), defn_env)
  File ".magma/PE_comb.py", line 5, in <module>
    class PE_comb(m.Circuit):
  File "/Users/lenny/repos/magma/magma/circuit.py", line 471, in __new__
    self.definition()
  File ".magma/PE_comb.py", line 30, in definition
    data01_addr_0 = io.config_addr[0:2] == family.BitVector[3](3)
  File "/Users/lenny/repos/mantle/mantle/common/operator.py", line 43, in wrapped
    check_widths(width, args)
  File "/Users/lenny/repos/mantle/mantle/common/operator.py", line 33, in check_widths
    f"All arguments should have the same length: {args}")
ValueError: All arguments should have the same length: (bits([PE_comb.config_addr[0], PE_comb.config_addr[1]
]), bits([1, 1, 0]))

The issue is that

            data01_addr = (config_addr[0:2] == family.BitVector[3](3))

doesn't type check. config_addr[0:2] is a 2 bit value, BitVector[3] is a 3 bit value, @rdaly525 what's the expected code? Should the config_addr slice be a 3 bit value?

[rdaly525]

Oh, I screwed up the indexing (it should be 3 bits). I wasnt able to get that far in my testing. Ill use the multiple outputs branch

[leonardt]

Okay, the change to magma was fairly small, so I'm not exactly sure if it works, let me know if you run into a problem, I'll try to craft a standalone magma unit test to verify it's functionality

[rdaly525]

@Kuree, the branch 'config' should be in a state which you could start trying to integrate it into garnet.

I just need to update the rest of the tests and write some more unit tests.

EDIT: Sorry, nevermind still seeing magma errors.

[rdaly525]

@leonardt, can you look at this branch again?
Latest magma error: when running pytest tests/test_pe.py

____________________________________________ ERROR collecting tests/test_pe.py ____________________________________________
tests/test_pe.py:38: in <module>
    pe_magma = gen_pe(magma.get_family(), use_assembler=True)
lassen/sim.py:351: in gen_pe
    PE = m.circuit.sequential(PE)
../magma/magma/ast_utils.py:75: in wrapped
    return fn(enclosing_env, *args, **kwargs)
../magma/magma/syntax/sequential.py:363: in _sequential
    circuit_def = ast_utils.compile_function_to_file(tree, cls.__name__, defn_env)
../magma/magma/ast_utils.py:47: in compile_function_to_file
    raise Exception(f"Error occured when compiling and executing m.circuit.combinational function {func_name}, see above") from None
E   Exception: Error occured when compiling and executing m.circuit.combinational function PE, see above
----------------------------------------------------- Captured stdout -----------------------------------------------------
Traceback (most recent call last):
  File "/Users/rdaly/magma/magma/ast_utils.py", line 42, in compile_function_to_file
    exec(compile(astor.to_source(tree), filename=file_name, mode="exec"), defn_env)
  File ".magma/PE_comb.py", line 5, in <module>
    class PE_comb(m.Circuit):
  File "/Users/rdaly/magma/magma/circuit.py", line 471, in __new__
    self.definition()
  File ".magma/PE_comb.py", line 50, in definition
    ra_0, ra_rdata_0 = self_rega_[RegisterMode_inst0.O0,
NameError: name 'self_rega_' is not defined

Traceback (most recent call last):
  File "/Users/rdaly/magma/magma/ast_utils.py", line 42, in compile_function_to_file
    exec(compile(astor.to_source(tree), filename=file_name, mode="exec"), defn_env)
  File ".magma/PE.py", line 5, in <module>
    class PE(m.Circuit):
  File "/Users/rdaly/magma/magma/circuit.py", line 471, in __new__
    self.definition()
  File ".magma/PE.py", line 34, in definition
    Data, Bit, Data32):
  File "/Users/rdaly/magma/magma/ast_utils.py", line 75, in wrapped
    return fn(enclosing_env, *args, **kwargs)
  File "/Users/rdaly/magma/magma/syntax/combinational.py", line 238, in combinational
    defn_env)
  File "/Users/rdaly/magma/magma/ast_utils.py", line 47, in compile_function_to_file
    raise Exception(f"Error occured when compiling and executing m.circuit.combinational function {func_name}, see above") from None
Exception: Error occured when compiling and executing m.circuit.combinational function PE_comb, see above

[rdaly525]

@Kuree, changed config_addr to 8 bits