Comments (4)
Spritetm
commented on June 26, 2024
Could depend on your see, can you change soc/Makefile to try a different one?
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ianjfrosst
commented on June 26, 2024
Tried and found a value that works. Should I make a PR for it?
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Spritetm
commented on June 26, 2024
You can if you want to, but there may not be much use, as the seed effects are consistent on one computer/install/... only. For instance, the current seed works for me. (pass at 51.79MHz)
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ianjfrosst
commented on June 26, 2024
Ah, I see. Though it might be deterministic. Well, that makes this issue irrelevant. Might make a PR making the seed value more clear for the FPGA docs.
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Related Issues (20)
- Pull new version of Badgetris submodule (no with audio, thanks Elliot!) HOT 1
- Implement yield() syscall
- Windows RiscV development Example Issue. HOT 3
- IPL elf loader doesn't handle __constructor__ or __destructor__ attributes HOT 1
- soc/ila/default-tiles.tsx points to a nonexistent file
- Make a branch for Supercon 2019 snapshot
- verilator doesn't operate clk24 HOT 2
- frame buffer problem causes horizontal line problems at specific y positions HOT 4
- cache state at reset leads to first 0x2000 addresses returning invalid data HOT 2
- error: conflicting types for 'GFXSPRITES'
- no doom makefile HOT 1
- Ndjdb
- soc svf upload failed HOT 2
- Unable to upload blink bit file HOT 1
- bitstream build with recent yosys don't boot HOT 1
- README how-to links 404 HOT 2
- Broken link in README.md HOT 2
- Need sprite/tile priority
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