sjtu-ectl Goto Github PK

alfans-er

Source codes for two algorithms in ALFANS paper that only involve error rate constraints.

alfans-er-em

Source codes for two algorithms in ALFANS paper that involve both error rate and error magnitues constraints.

alsrac

ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set

booleannetwork

A simple data structure for boolean networks.

dals

DALS: Delay-Driven Approximate Logic Synthesis

eda-resource

Repository to store resources. Including benchmarking data, technology mapping libraries, etc.

gomil

GOMIL: Global Optimization of Multiplier by Integer Linear Programming

hedals

Highly efficient delay-driven approximate logic synthesis

mecals

An approximate logic synthesis tool under the maximum error constraint

minac

MinAC: Minimal-Area Approximate Compressor Design Based on Exact Synthesis for Approximate Multipliers

minsc

MinSC: An Exact Synthesis-Based Method for Minimal-AreaStochastic Circuits under Relaxed Error Bound

salodi

SALODI: Simultaneous Area and Latency Optimization for Stochastic Circuits by D Flip-flop Insertion

scgen

simulator

A small simulator generates random inputs to `blif` circuit to simulator its behavior.

statictiminganalysis

stoca

STOCA: Stochastic Circuit Synthesis by Cube Assignment

tfasc

TFASC: Target Function Approximation for Stochastic Circuit Minimization

vecbee

VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis