Hicret's Projects
Xilinx Artix-7 FPGA design using block ram, XADC and a SPI slave (SCARF). The block ram is dual port and can be written by either SPI or XADC samples, and only read by SPI.
Placa controladora para motores controlada por un microcontrolador ATMEGA328
MatLAB and Python implementations for 6-DOF IMU attitude estimation using Kalman Filters, Complementary Filters, etc.
An autonomous vehicle guide for computer science students and software engineers
A curated list of awesome resources for HDL design and verification
A curated list of awesome resources for electronic engineers and hobbyists
List of awesome open source hardware tools, generators, and reusable designs
Tooling for professional robotic development in C++ and Python with a touch of ROS, autonomous driving and aerospace: https://freerobotics.tools/
A list of awesome Robotics resources
:satellite: A curated list of awesome Real Time Communications resources
😎 curated list of open source photonics projects
Homework for Rendszerarchitekturak with Feher Béla & Wacha Gabor :)
A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple masters arbitration. Simulation waveforms are also included.
一套AXI4 interconnect 组件,通过简单连接可以搭建需要的AXI interconnect。
USB to 3 Port Serial (UART) adapter firmware for STM32 Blue Pill.
https://caravel-user-project.readthedocs.io
SPI slave to External SRAM interface for Cmod A7
Cortex Microcontroller Software Interface Standard
:mortar_board: Path to a free self-taught education in Computer Science!
Documentation for the OpenHW Group's set of CORE-V RISC-V cores
Functional verification project for the CORE-V family of RISC-V cores.
SweRV EH1 core
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
This repo contains example codes for data structures in C language.
A dual core RISC-V processor (using PULP platform SoC) implemented on a Digilent Arty S7-50 FPGA board.
ESnet general-purpose FPGA design library.
[OUTDATED] A living collection of tutorials to support Fab Academy http://docs.academany.org/FabAcademy-Tutorials/_book/