shishan Goto Github PK

alexa-app

A framework for Alexa (Amazon Echo) apps using Node.js

alexa-avs-sample-app

2018-01-25 - The AVS Java Sample App is maintenance mode. Please use the AVS Device SDK.

android_device_asus_flo

blockchain

A simple Blockchain in Python

chisel3

Chisel 3

e200_opensource

The Ultra-Low Power RISC Core

flask-ask

Alexa Skills Kit for Python

gdspy

Python module for creating GDSII stream files, usually CAD layouts.

gen_apb_file

genius-tcad-open

hdl-bits-solutions

This is a repository containing solutions to the problem statements given in HDL Bits website.

hello_git

my first repository

i3c-slave-design

MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.

lans.py

Inject code, jam wifi, and spy on wifi users

linux-0.11-lab

Docker/Qemu/Bochs Based Linux 0.11 Kernel Development Environment

make-a-smart-speaker

A collection of resources to make a smart speaker

nexmon

The C-based Firmware Patching Framework for Broadcom/Cypress WiFi Chips that enables Monitor Mode, Frame Injection and much more

opentitan

OpenTitan: Open source silicon root of trust

openwifi

open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

or1ksim

The OpenRISC 1000 architectural simulator

pybitmessage

Reference client for Bitmessage: a P2P encrypted decentralised communication protocol:

rocket-chip

Rocket Chip Generator

ruby-gdsii

GDSII reader and writer with both high-level (easier to use) and low-level (faster performance) methods.

sm3_core

verilog-ethernet

Verilog Ethernet components for FPGA implementation

wujian100_open

IC design and development should be faster，simpler and more reliable