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cnn

基于Java实现CNN，并附MNIST和语音（MFCC特征）性别识别示例。

convnn_fpga_accelerator

convolutional-neural-network-hardware-using-verilog

A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. This layer takes input from a memory. A MATLAB script was created to get the floating point inputs and convert it to 7 bit signed binary output. This was done for inputs as well as the weights in these two layers. Sigmoid case statement was also implemented in verilog to get the sigmoid values for intermediate outputs in a layer. This design was simulated and synthesized at 50 MHz on Quartus Prime 17.0. The FPGA family was Cyclone V. Total logic elements used were 724, total bits used 121856(only 50% use of memory).

des

fpga-cnn

FPGA implementation of Cellular Neural Network (CNN)

fpga-imaging-library

An open source library for image processing on FPGA.

fpga_based_cnn

FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

hdl

HDL libraries and projects

leetcode

oh

Silicon proven Verilog library for IC and FPGA designers

pipecnn

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

sh1neon.github.io

voc2007