Boot procedure bypass ROM FW copy to SRAM about riscv_vhdl

[sergeykhbr]

• Download the latest GCC from https://github.com/gnu-mcu-eclipse/riscv-none-gcc/releases/ (thanks to Liviu Ionescu [email protected]).
• Build elf2raw64 tool and copy it into gcc/bin folder (setup PATH variable).
• Edit examples/boot/src/main.c file by adding your functionality into method _init() before copy_image() call.
• Modify method led_set(int) accordingly with your requirements.
• Run make (or make.bat) from examples/boot/makefiles.
  You should get the new HEX-file with your modifications directly used by rtl.

You can do the same things with other examples.

Image is copying under conditions in bootloader:

    if (tech != TECH_INFERRED && pnp->fwid == 0) {
        memcpy(sram, fwrom, FW_IMAGE_SIZE_BYTES);
    }

It means: not behaviour simulation AND run the first time after power-on. So I suppose you are running NOT behaviour simulation.

[daffy1108]

Hi Sergey,

Looks like we can modify
fw/boot/src/main.c
to add the peripheral code before "copy_image()".
If we were to comment out the "copy_image()" would RISCV read and execute
from ROMIMAGE instead of SRAM ?

void _init() {
uint32_t tech;
pnp_map *pnp = (pnp_map *)ADDR_NASTI_SLAVE_PNP;
uart_map *uart = (uart_map *)ADDR_NASTI_SLAVE_UART1;
// Half period of the uart = Fbus / 115200 / 2 = 70 MHz / 115200 / 2:
//uart->scaler = 304; // 70 MHz
uart->scaler = 260; // 60 MHz

led_set(0x01);
print_uart("Boot . . .", 10);
led_set(0x02);

///////////////////////////// PUT NEW PERIPHERAL CODE HERE ////////////////
copy_image(); /////////// WHAT HAPPENS IF WE COMMENT THIS OUT ???? //////
led_set(0x03);
print_uart("OK\r\n", 4);
led_set(0x04);
}

[sergeykhbr]

You can remove copy_image() method if your target (configuration parameter) CFG_MEMTECH = inferred OR /rtl/techmap/gencomp/gencomp.vhd is_fpga() returns 1.
In this case SRAM module (512 KB) instantiates tech. modules sram8_inferred_init that will be initialized by FwImage after power-on.

Otherwise you will have unpredicatable behaviour after jump to SRAM base address. I forget is there compressed instruction corresponding to zero value 0x0000 that CPU will try to execute or it will raise an exception "unknown instruction".