Comments (4)
Very likely. Thanks a lot.
from rocket-rocc-examples.
Is it the csrrs instruction in the patch that is used to set the XS bits?
I have not run the proxy kernel using that patch in some time. However, there's circumstantial evidence that that approach, or something like it, should still work given that Gemmini is working with the proxy kernel.
from rocket-rocc-examples.
It is the csrrs instruction in my testing code. I need to handle the RoCC interrupt in my testing code. I think Gemmini interrupt is used for address translation, and it is handled by the core.
from rocket-rocc-examples.
The user-level spec states:
Attempts to access a non-existent CSR raise an illegal instruction exception. Attempts to access a
CSR without appropriate privilege level or to write a read-only register also raise illegal instruction
exceptions.
I would interpret that as your csrrs
instruction is running without sufficient privilege to do what you are trying to do. I think that if you run a test under the proxy kernel, that's user mode, while running bare metal is likely machine mode (this may be wrong).
from rocket-rocc-examples.
Related Issues (19)
- Add examples for all available Rocket RoCCs HOT 1
- Assertion `buf != MAP_FAILED' failed. HOT 1
- There is no test-accumulator HOT 1
- Why RoCC accelerator requires physical address when accessing L1D cache? HOT 1
- An illegal instruction was executed! HOT 2
- Complie custom instructions error HOT 1
- problem to build riscv-pk after patch HOT 4
- Building configuration failed HOT 8
- Do_load instruction for 32 bit. HOT 4
- test won't terminate HOT 3
- Build failed
- after pk patch, It seems program hang forever HOT 4
- About Load operation in this example HOT 2
- Testing accumulator.c using a Linux kernel instead of pk HOT 4
- "Illegal Instruction Executed" when running the pk test HOT 5
- Illegal instruction error for accumulator example HOT 13
- xcustom.h compile error HOT 12
- Connecting RoCC to system HOT 3
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