Comments (3)
palmer-dabbelt
commented on July 28, 2024
1
This should fix it. It's part of the submission (the riscv-for-submission-v3 branch).
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aswaterman
commented on July 28, 2024
-mstrict-align was introduced relatively recently (early 2017, I think), so you likely need to upgrade gcc.
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palmer-dabbelt
commented on July 28, 2024
I'm assuming this got fixed.
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Related Issues (20)
- Build fails with lack of auto-generated headers HOT 6
- what branch or tag is suitable for riscv-qemu HOT 2
- Documentation/riscv HOT 1
- CONFIG_NO_HZ=y possibly broken HOT 8
- WARNING: CPU: 0 PID: 0 at drivers/irqchip/irq-riscv-intc.c:158 irq_enable+0x32/0x58 HOT 4
- I can't do "make ARCH=riscv". HOT 2
- Asking for help! Error in execution of compiled : $Top/riscv-tools/lib/gcc/riscv64-unknown-elf/7.2.0/../../../../riscv64-unknown-elf/bin/ld：unsupported -shared HOT 3
- linker issue undefined reference to __lshrti3 HOT 9
- patch for PTRACE_SETREGSET bug HOT 4
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- icache not flushed correctly HOT 8
- riscv-linux compile issue in branch riscv-all HOT 1
- Stopping lo interface Oops HOT 2
- unknown architecture riscv. HOT 1
- GPIO & PWM spec for Unleashed HOT 2
- perf_tools support
- What instruction sets do I need to run Linux on my own risc-v CPU? HOT 7
- Any plan for upstreaming DMA32? HOT 2
- Kernel errors on loading modules
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