Name: Zhiyuan Wan
Type: User
Company: A certain cloud computing company
Bio: We are in the midst of crisis, the challenge is real, and they are many. We must pull up our pants, dust ourselves off, and fight as♂we♂can.
Blog: http://iloli.bid
Zhiyuan Wan's Projects
A board outline and pad connections for 72-pin SIMM memory.
Some maybe useful program written in C for an old-school arch.
Collection of IPs based on AMBA (AHB, APB, AXI) protocols
An AVR compliant RISC 8-bit softcore for anlogic FPGA.
Opensource tools for Anlogic FPGA.
Template project to demonstrate how to realize high speed USB transmission over ELF2 FPGA platform.
Mirror of Ardour Source Code
open-source electronics prototyping platform
Fork of the upstream binutils-gdb repository for AVR processors
An avr-libc fork.
A extremely size-optimized RV32I soft processor for FPGA.
A simple and naive http server for embedded system,
An Arduino emulation on Anlogic FPGA platform.
An Opensource singing editor.
Free, Opensource Cadencii UTAU synthesis tools
Cadencii-NextGeneration
CH55x software development kit for SDCC
CH55x USB MIDI Host & Device.
A simple program to emulate Chengdu Metro's Variable Frequency Driver's excitation noise
STM32 port for CMSIS-DAP with additional serial (CDC) support
Interface Firmware providing USB CMSIS-DAP for debugging, USB MSD for programming, USB Serial for communication.
Common IP cores by Zhiyuan Wan. MIT license.
RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
IP Cores
1、实时解析串口数据并绘制相关曲线 | 2、串口单独一个进程(不影响GUI刷新) | 3、曲线、串口参数可配置、可保存
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
STM32F042Fx based CMSIS-DAP debugger firmware
DFU Bootloader for STM32 chips