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PiotrZierhoffer avatar PiotrZierhoffer commented on July 20, 2024

Hi @xobs, thanks for spotting this. Can you please correct the second link? I assume it was for something else, like ref manual? I'm asking because it might be a difference between versions of the SoC (we reuse this model a lot, maybe this should be a config option for a SoC).

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xobs avatar xobs commented on July 20, 2024

Apologies -- I've updated the Issue with an image taken from RM0090 which shows the STM32F429. I've seen a similar issue on the STM32H7, which is similarly 16-bits.

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PiotrZierhoffer avatar PiotrZierhoffer commented on July 20, 2024

Thanks a lot

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MateuszKarlic avatar MateuszKarlic commented on July 20, 2024

Hi @xobs
Since, we reuse this peripheral model with 16- and 32-bit configuration (e.g. on stm32h753, timer2 is 32 bit, while timer3 is 16 bit), we opted to clamp fields at registration time, by inferring the timer's fields width from the value of initialLimit (renode/renode-infrastructure@519d514), with the only exception being the Prescaler, that always should be 16 bits wide. So, if you set the initialLimit to lower value, it will clamp the length of these fields, as for example is the case here:

timer3: Timers.STM32_Timer @ sysbus <0x40000400, +0x400>
-> nvic@29
frequency: 10000000
initialLimit: 0xFFFF

The model will select the minimal width, where the initialLimit will fit within the timer's registers - so for limit of 0xFFFF, 16-bit registers will be generated.

Thanks for reporting this issue! Please check if this fix works for you.

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xobs avatar xobs commented on July 20, 2024

That's a subtle catch, thanks for finding the initialLimit issue!

The fix works for me.

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