- 🌱 I'm a graduate student at ICAIS Lab @ Nanjing University, majoring in Integrated Circuit Engineering.
- 👀 I'm researching on Posit-based Hardware as well as its Applications in Deep Learning.
- 🤔 I'm currently working on Integration of Posit format with RISC-V.
- 🔭 My main coding language is Verilog/SystemVerilog, but I'm also familiar with C, Python, MATLAB, etc.
- 💬 Ask me about ...
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Name: Qiong Li
Type: User
Company: Nanjing University
Bio: Graduate Student @ Lab of Integrated Circuits and Intelligent Systems (ICAIS), Nanjing University
Location: Nanjing, China