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I am able to run the complete code now. I had to change the version of pulp-soc, update ips, and then remove and regenerate the bistreams for the Zedboard. I also followed the changes specified over here : Mismatch between simulation and FPGA emulation behavior #274 and rebuilt hwme.c code and was able to get the output. The only issue I am facing right now is that the output (d) is not getting correctly updated: (initial 4 digits are the 2nd value of a, b, c, and d array, and I have printed first 6 values of d after computation)
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