Comments (6)
Hi, thanks for resolving the original question. Thanks for your assistance @egiacomin.
@LY-Mei regarding your follow-up question: our mapping model is that the loop nests describe the tiled iteration space of the workload over all the workload dimensions. The data-space tiles are derived as projections of the iteration space. Therefore, the dimensions of data-spaces are always going to be "coupled" (as you observed), since they are being projected from a common iteration space. Together with the additional options exposed via bypassing, we have found that this approach yields a rich mapspace.
We have occasionally considered per-dataspace loop nests, but we have not found a compelling-enough reason to pursue implementing them. They seem to open the door to describing nonsensical mappings (where the data delivery pattern at the arithmetic units are inconsistent, leading to incorrect results) or suboptimal mappings, and may expand the already large mapspaces, putting further strain on the search heuristics. However, if you come across a scenario showing that decoupled per-dataspace loop nests can provide a significant advantage over our iteration-space based loop nests, please let us know and we will be happy to revisit our decisions.
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Hi, (I am just a Timeloop user), I believe this could help:
https://github.com/Accelergy-Project/timeloop-accelergy-exercises/blob/master/exercises/timeloop%2Baccelergy/constraints/eyeriss_like_arch_constraints.yaml
They use some "bypass" constraints here, for instance, the following means that the "ifmap_spad" buffer can only contains Inputs (the dot should be a dash):
- target: ifmap_spad
type: bypass
bypass: [Weights, Outputs]
keep: [Inputs]
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Sorry that I overlooked the EX03 part two, in which you have already provided such an example...
But then another question popped up (still focus on the model itself): suppose we have a Register File (RF) level and a Global Buffer (GB) level, both for storing Input Activation and Weight; if a loop "C=8" belongs to GB level for Weight, while this loop belongs to RF level for Input Activation, how can I represent this situation in the map file? It seems to me that bypassing cannot cover this situation. Or do you think such a situation is not practical in real implementation? Or, again, I overlooked something. :)
Looking forward to your reply! Thanks!
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Hi, (I am just a Timeloop user), I believe this could help:
https://github.com/Accelergy-Project/timeloop-accelergy-exercises/blob/master/exercises/timeloop%2Baccelergy/constraints/eyeriss_like_arch_constraints.yamlThey use some "bypass" constraints here, for instance, the following means that the "ifmap_spad" buffer can only contains Inputs (the dot should be a dash):
- target: ifmap_spad
type: bypass
bypass: [Weights, Outputs]
keep: [Inputs]
Thank you a lot, egiacomin! Yes, my bad, I overlooked the EX03 second file.
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Let me rephrase my question a bit to make it more generic:
If two or more than two operands out of the total three (Weight/Input Activation/Output Activation) are jointly stored in a level of memory (RF or GB or DRAM, doesn't matter), should their individual loop sets, which belong to that level of memory, be the same, or can them be different?
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Thank you for your quick and clear response, Angshuman! I see!
Hi, thanks for resolving the original question. Thanks for your assistance @egiacomin.
@LY-Mei regarding your follow-up question: our mapping model is that the loop nests describe the tiled iteration space of the workload over all the workload dimensions. The data-space tiles are derived as projections of the iteration space. Therefore, the dimensions of data-spaces are always going to be "coupled" (as you observed), since they are being projected from a common iteration space. Together with the additional options exposed via bypassing, we have found that this approach yields a rich mapspace.
We have occasionally considered per-dataspace loop nests, but we have not found a compelling-enough reason to pursue implementing them. They seem to open the door to describing nonsensical mappings (where the data delivery pattern at the arithmetic units are inconsistent, leading to incorrect results) or suboptimal mappings, and may expand the already large mapspaces, putting further strain on the search heuristics. However, if you come across a scenario showing that decoupled per-dataspace loop nests can provide a significant advantage over our iteration-space based loop nests, please let us know and we will be happy to revisit our decisions.
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Related Issues (20)
- skipping at a compute target?
- More operands for problem.yaml HOT 4
- Architecture Specification changes HOT 14
- Problem in getting optimal dataflow HOT 10
- Mapspace search Bug
- Checks for unknown dataspace & unknown dimension in Model
- Timeloop mapper constraint output HOT 3
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- Ruby >32GB memory usage, out of memory HOT 11
- Cutlass permutation is KMN? HOT 1
- The register in timeloop is accessible to all PEs, right? HOT 1
- What is updated in v4 version? HOT 1
- error when I do "make install_timeloop" HOT 6
- Maximizing PE array utilization in convolution runs HOT 1
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- Overall latency estimation HOT 1
- Modeling SIMD architectures
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