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Nihar Kargal Mani's Projects

16bit-alu-design icon 16bit-alu-design

Design of a 16-bit ALU using Verilog HDL. Done as a part of the coursework advanced digital system design using Verilog HDL.

bist-design icon bist-design

Done as a part of the coursework, Design For Testing and Testability. Designed and implemented in Verilog to add Built in Self Test (BIST) capabilities to a given combinational logic. The Test Pattern Generator (TPG), Output Response Analyzer (ORA) and BIST controller were designed. A 1-bit full adder was considered as the circuit under test.

wafer-fault-detection icon wafer-fault-detection

Built a classification methodology to predict the quality of wafer sensors based on the given training data.

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