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destiny_3d_cache

Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of following repository:

distributionawarednntesting

ece222labs

ARM Assembly on MCB1700B board with LPC1768 microcontroller. μVision, developed by Keil ( manufacturer of the board) was used to write / debug the code and run it on the board or run the simulations.

hd-classification

Port HD-Classification to use Hetero-C++

hdc-workload

Demo code that shows fancy workloads using Hyperdimensional Computing (HDC)

hyperdbg

HyperDbg debugger is an open-source, user mode and kernel mode Windows debugger with a focus on using hardware technologies.

hypervisor-from-scratch

Source code of a multiple series of tutorial about hypervisor. Available at:

neural-networks-on-silicon

This is a collection of works on neural networks and neural accelerators.

programmingknowlegde-tkinter-series

riscv

RISC-V CPU Core (RV32IM)

simple-discrete-event-simulator