Qianyu Cheng's Projects
2022 Xilinx Winter Camp
Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multiple Alveo cards.
中文命名实体识别(包括多种模型:HMM,CRF,BiLSTM,BiLSTM+CRF的具体实现)
view at https://xupsh.github.io/ccc2021/
Filter2D implementation with multiple AI Engine parallelism.
UESTC Freshman Workshop - Computing Systems: Endless Frontier
Code and dataset for IEEE TKDE paper "Dynamic Heterogeneous Information Network Embedding with Meta-path based Proximity"
An LoongArch core implemented by Chisel.
A HLS implementation of custom 2D convolution algorithm.
My Bachelor Degree Thesis
cqy归档
Occlum is a memory-safe, multi-process library OS for Intel SGX
Modified Version for Vitis 2022.2
educational microarchitectures for risc-v isa
My Rustling code repo in Tsinghua OSCamp Spring 2024
A script for building self-hosted CERNET (.edu.cn) campus VPN service using tailscale.
Automatically build and test the MPI implementations of Eratosthenes Sieve. For Distributed Parallel Computing Spring 2021 in UESTC.
Docker Image for Xilinx Vitis Unified Software Platform Installation
Xv6 for RISC-V