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adiar

An I/O-efficient implementation of (Binary) Decision Diagrams

bdd-fpga

cudd

DEPRECATED (see readme). An unofficial mirror of the CUDD decision diagrams package modified to build shared object files

cudd-1

CUDD: CU Decision Diagram package - unofficial git mirror of https://web.archive.org/web/20180127051756/http://vlsi.colorado.edu/~fabio/CUDD/html/index.html (intro: https://web.archive.org/web/20150215010018/http://vlsi.colorado.edu/~fabio/CUDD/cuddIntro.html)

dd

Binary Decision Diagrams (BDDs) in pure Python and Cython wrappers of CUDD, Sylvan, and BuDDy

libsystemctlm-soc

SystemC/TLM-2.0 Co-simulation framework

openfpga

An Open-source FPGA IP Generator

pltlsmc

from YH~

plundervolt

riscv-formal

RISC-V Formal Verification Framework

sgx-step

A practical attack framework for precise enclave execution control

sylvan

Implementation of multi-core (binary) decision diagrams

typora_markdown-

由于Typora图片默认存放到系统中，手动转移繁琐，所以写了一个图片提取脚本