limanjihe Goto Github PK

996.icu

Repo for counting stars and contributing. Press F to pay respect to glorious developers.

ahb2apb-bridge

An uvm verification env for ahb2apb bridge

api-config-chipsalliance

A Scala library for Context-Dependent Evironments

c

C语言

caliptra

Caliptra IP and firmware for integrated Root of Trust block

caliptra-dpe

High level module that implements DPE and defines high-level traits that are used to communicate with the crypto peripherals and PCRs

caliptra-rtl

HW Design Collateral for Caliptra RoT IP

caliptra-sw

Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

chisel-examples

Chisel examples and code snippets

chisel-tutorial

chisel tutorial exercises and answers

chisel3

Chisel 3: A Modern Hardware Design Language

e203_hbirdv2

The Ultra-Low Power RISC-V Core

embedded-doc

嵌入式软件开发文档整理

fpga

数字IC相关资料

fpga-zynq

fpga_sm4

FPGA implementation of Chinese SM4 encryption algorithm.

ghidra

Ghidra is a software reverse engineering (SRE) framework

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

ibex-demo-system

A demo system for Ibex including debug support and some peripherals

labarcfpgasimulatordesktop

learning

Learning Shell，Python，Golang，System，Network

lihang-code

《统计学习方法》的代码实现

limanjihe.github.io

personal Web

linux-0.12

赵炯老师《linux-0.12 内核完全剖析》读书笔记及linux-0.12注释源码

lowrisc-chip

The root repo for lowRISC project and FPGA demos.

nutshell

RISC-V SoC designed by students in UCAS

nutshell-doc

nysa-sata

opentitan

OpenTitan: Open source silicon root of trust