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arduino-library-files

arduino files for use both by the compiler and the main symfony project

bare-metal-programming-guide

A bare metal programming guide (ARM microcontrollers)

centroid-based_object_tracking

A case study: centroid based object tracking

computervision-projects

Some simple computer vision implementations using OpenCV

dbg-macro

A dbg(…) macro for C++

deblurgan

Image Deblurring using Generative Adversarial Networks

ece257b_hw2_st_transform

ee-resources

A list of resources I've found useful as an electrical engineer.

embedded-board-linux

Allwinner V3S Opensource

fpga-design-of-a-digital-analog-clock-display-using-digilent-basys3-artix-7

The project uses a Xilinx Artix-7 FPGA on a Digilent Basys 3 board to design a clock whose seconds, minutes, & hours are displayed on a Quad 7-segment display & can also be displayed on a vga display. Picoblaze processor is used to control the Analog & Digital displays of the clock.

fucking-algorithm

刷算法全靠套路，认准 labuladong 就够了！English version supported! Crack LeetCode, not only how, but also why.

ganhacks

starter from "How to Train a GAN?" at NIPS2016

gans

Generative Adversarial Networks implemented in PyTorch and Tensorflow

gans-awesome-applications

Curated list of awesome GAN applications and demo

github-auto-push-for-windows

A simple batch script that executes every X seconds and automatically pushes the contents of the specified directory to your GitHub repository.

icuas23_competition

The main repository for ICUAS'23 UAV competition

image-processing

Image Processing Toolbox in Verilog using Basys3 FPGA

learn-nlp-with-transformers

we want to create a repo to illustrate usage of transformers in chinese

mcu-class-1-external-docs

Bare Metal Embedded Software Course Documents

monica

DIY Watch based on ESP32-S3 and Amoled screen

personalwebsite

pythonrobotics

Python sample codes for robotics algorithms.

testrepo

ultrasonic

Vivado project implemented on SystemVerilog for Basys 3

verilog-projects

This repository contains source code for past labs and projects involving FPGA and Verilog based designs

vrn

:man: Code for "Large Pose 3D Face Reconstruction from a Single Image via Direct Volumetric CNN Regression"