Comments (4)
The execution driven is done QEMU (QEMU is executed and feed the instructions into macsim). It was tested with an old version of QEMU and the instruction need to be updated to include the instruction. If there is a user who wants to use that feature, we will put the writing instruction in a higher priority.
from macsim.
If execution-driven is done by QEMU, can I assume that macsim is instantiated as an PCI-E device in QEMU? And we can boot up linux in QEMU and run real OpenCL workload in it to interact with macsim divice?
from macsim.
The instructions that are executed in QEMU is piped into macsim, so only the instruction streams are passed to QEMU. macsim is not connected with QEMU. In earlier versions, macsim can control the progress of instructions in QEMU but I don't think that feature is currently available (at least we haven't tested it for a while). OpenCL can run on Pin so you can generate instruction streams using Pin.
from macsim.
Thanks. Could you please point me any examples that how can I generate instruction streams (trace) for Intel GEN GPU?
from macsim.
Related Issues (20)
- About multi-threads
- about pin 2.12 version HOT 2
- about the use of macsim sst HOT 1
- IARG_BRANCH_TARGET_ADDR is invalid for XBEGIN and XEND HOT 2
- Using Pinballs in Macsim HOT 2
- GPU traces with previous version of MacSim? HOT 2
- Trace Generator bug in creating traces for multi-threaded code HOT 2
- OpenCL Thread 0 in x86 trace generator causing OOM in system HOT 1
- DRAM interface for WRITE/READ? HOT 5
- Getting Segmentation fault when using param enable_pref_large_core. HOT 5
- Having difficulties with python when building HOT 7
- Shared LLC(between CPU-GPU) HOT 2
- Question HOT 1
- Questions:llc_decoupled_network
- Generating traces for integrated GPU
- frontend_c::btb_access function returns wrong value if BTB was disabled
- Perfect_BP should not have an impact if USE_BRANCH_PREDICTION was set to false
- disabling BP has no impact in case of CPU (x86)
- internal submodule link is unvalid
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from macsim.